kern/124127: [msk] watchdog timeout (missed Tx interrupts) -- recovering

[Pyun YongHyeon]

The following reply was made to PR kern/124127; it has been noted by GNATS.

From: Pyun YongHyeon <pyunyh at gmail.com>
To: sam <samflanker at gmail.com>
Cc: yongari at freebsd.org, bug-followup at FreeBSD.org
Subject: Re: kern/124127: [msk] watchdog timeout (missed Tx interrupts) -- recovering
Date: Fri, 19 Jun 2009 09:40:46 +0900

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 On Thu, Jul 31, 2008 at 04:06:42PM +0400, sam wrote:
 > -----------------------------------------------
 > Jul 30 11:13:47 moon3 kernel: msk0: watchdog timeout (missed Tx 
 > interrupts) -- recovering
 > Jul 30 11:14:44 moon3 kernel: msk0: watchdog timeout (missed Tx 
 > interrupts) -- recovering
 > -----------------------------------------------
 > 
 > -----------------------------------------------
 > Jul  29 23:18:28 moon3 kernel: mskc0: <Marvell Yukon 88E8050 Gigabit 
 > Ethernet> port 0xdf00-0xdfff mem 0xdeefc000-0xdeefffff irq 16 at device 
 > 0.0 on pci2
 > Jul  29 23:18:28 moon3 kernel: msk0: <Marvell Technology Group Ltd. 
 > Yukon EC Id 0xb6 Rev 0x02> on mskc0
 > 
 > Jul  29 23:18:28 moon3 kernel: miibus0: <MII bus> on msk0
 > -----------------------------------------------
 > 
 > -----------------------------------------------
 > FreeBSD moon3 7.0-RELEASE-p2 FreeBSD 7.0-RELEASE-p2 #5: Wed Jul 27 
 > 15:00:14 MSD 2008     root at moon3:/usr/src/sys/i386/compile/MOON3  i386
 > -----------------------------------------------
 > 
 > I confirm this problem.
 > 
 > /Vladimir Ermakov
 > 
 > 
 
 Would you try attached patch and let me know hot it goes?
 
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 Index: sys/dev/msk/if_msk.c
 ===================================================================
 --- sys/dev/msk/if_msk.c	(revision 194467)
 +++ sys/dev/msk/if_msk.c	(working copy)
 @@ -1387,27 +1387,26 @@
  	CSR_WRITE_4(sc, STAT_LIST_ADDR_HI, MSK_ADDR_HI(addr));
  	/* Set the status list last index. */
  	CSR_WRITE_2(sc, STAT_LAST_IDX, MSK_STAT_RING_CNT - 1);
 -	if (sc->msk_hw_id == CHIP_ID_YUKON_EC &&
 -	    sc->msk_hw_rev == CHIP_REV_YU_EC_A1) {
 -		/* WA for dev. #4.3 */
 -		CSR_WRITE_2(sc, STAT_TX_IDX_TH, ST_TXTH_IDX_MASK);
 -		/* WA for dev. #4.18 */
 -		CSR_WRITE_1(sc, STAT_FIFO_WM, 0x21);
 -		CSR_WRITE_1(sc, STAT_FIFO_ISR_WM, 0x07);
 -	} else {
 -		CSR_WRITE_2(sc, STAT_TX_IDX_TH, 0x0a);
 -		CSR_WRITE_1(sc, STAT_FIFO_WM, 0x10);
 -		if (sc->msk_hw_id == CHIP_ID_YUKON_XL &&
 -		    sc->msk_hw_rev == CHIP_REV_YU_XL_A0)
 -			CSR_WRITE_1(sc, STAT_FIFO_ISR_WM, 0x04);
 -		else
 -			CSR_WRITE_1(sc, STAT_FIFO_ISR_WM, 0x10);
 -		CSR_WRITE_4(sc, STAT_ISR_TIMER_INI, 0x0190);
 -	}
  	/*
 -	 * Use default value for STAT_ISR_TIMER_INI, STAT_LEV_TIMER_INI.
 +	 * XXX
 +	 * Interrupt moderation and coalescing frames should be
 +	 * controllable with sysctl variables or loader tunables
 +	 * but the relationship between status updates and
 +	 * interrupt moderation are not clear to me. Some hardware
 +	 * revisions seem to very sensitive to these parameters
 +	 * and could be resulted in poor performance as well as 
 +	 * non-working situation if improper values were chosen.
  	 */
 +	CSR_WRITE_2(sc, STAT_TX_IDX_TH, 0x0a);
 +	CSR_WRITE_1(sc, STAT_FIFO_WM, 0x10);
 +	if (sc->msk_hw_id == CHIP_ID_YUKON_XL &&
 +	    sc->msk_hw_rev == CHIP_REV_YU_XL_A0)
 +		CSR_WRITE_1(sc, STAT_FIFO_ISR_WM, 0x04);
 +	else
 +		CSR_WRITE_1(sc, STAT_FIFO_ISR_WM, 0x10);
  	CSR_WRITE_4(sc, STAT_TX_TIMER_INI, MSK_USECS(sc, 1000));
 +	CSR_WRITE_4(sc, STAT_ISR_TIMER_INI, MSK_USECS(sc, 30));
 +	CSR_WRITE_4(sc, STAT_LEV_TIMER_INI, MSK_USECS(sc, 50));
  
  	/* Enable status unit. */
  	CSR_WRITE_4(sc, STAT_CTRL, SC_STAT_OP_ON);
 
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