I (think) the AR8327 switch support now works

[Milan Obuch]

On Sat, 8 Mar 2014 07:44:44 -0800
Adrian Chadd <adrian at freebsd.org> wrote:

> Hm,
> 
> On 8 March 2014 05:09, Milan Obuch <freebsd-mips at dino.sk> wrote:
> > On Sat, 8 Mar 2014 00:55:38 -0800
> > Adrian Chadd <adrian at freebsd.org> wrote:
> >
> >> Look at if_arge.c - arge_fetch_mdiobus_clock_rate() . See whether
> >> the openwrt config sets the mdiobus frequency to something.
> >>
> >> The AR9344 defaults to 'MAC_MII_CFG_CLOCK_DIV_58'.
> >>
> >> Maybe you can fiddle with which divisor it uses.
> >>
> >>
> >> -a
> >>
> >
> > OK, I will try to look there, but in between, some outcome from my
> > tests.
> >
> > 1. AR8327 does not teel much - all I can see there is just
> >
> > argemdio0: <Atheros AR71xx built-in ethernet interface, MDIO
> > controller> at mem 0x19000000-0x19000fff on nexus0 mdio0: <MDIO> on
> > controller> argemdio0
> > mdioproxy0: <MII/MDIO proxy, MDIO side> on mdio0
> > arswitch0: readreg    0: 12041204
> >
> 
> Use 0x08x instead of %d - that way it's more obvious what it's
> reading.
>

I used %X, just no 0x prefix... that way it would be

arswitch0: readreg 0x00000000: 0x12041204

> > Nothing else. Do you have any idea why there is only one read of
> > register at address 0? Where is this read in source? What is in this
> > register? It looks like there is expected some other value and
> > therefore AR8327 is not recognised.
> >
> > 2. AR9340 is not correctly initialised, at least I can't see any
> > traffic passing to physical port(s) - I can start dhclient arge1
> > but I see nothing at DHCP server comming from that particular MAC,
> > thus no address is beeing assigned. If I assign IP manually,
> > packets do not reach wire - nothing is seen there.
> 
> If arswitch0 doesn't create an mdiobus1, then it'll not all probe
> right. What's the current full dmesg?
> 

With regard to arswitch0, that's just it - only one readreg debug
printf and nothing more. So it looks like being rejected straight from
the beginning...

Full dmesg (with readreg/writereg debug printf output), well, up to
the point of mounting root is attached.

In OpenWrt sources, I found something interesting in the file at
https://dev.openwrt.org/browser/trunk/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
- it looks like the function ath79_register_mdio (lines 176 - 267)
should set mdio clock rate, and for 934x SoC it calls helper function
ar934x_get_mdio_ref_clock (lines 151 - 174). Maybe some hint could be
here, I don't know, I am not that familiar with OpenWrt sources, I just
tested here both switches are working.

Milan
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