svn commit: r268093 - head/sys/dev/etherswitch/rtl8366
Adrian Chadd
adrian at freebsd.org
Tue Jul 1 17:20:49 UTC 2014
Woo, thanks!
-a
On 1 July 2014 07:33, Luiz Otavio O Souza <loos at freebsd.org> wrote:
> Author: loos
> Date: Tue Jul 1 14:33:48 2014
> New Revision: 268093
> URL: http://svnweb.freebsd.org/changeset/base/268093
>
> Log:
> Add the CPU port flag to the CPU port on rtl8366 (port 5).
>
> Do not allow any media change on the switch CPU port.
>
> Tested on TP-Link WR1043ND.
>
> Modified:
> head/sys/dev/etherswitch/rtl8366/rtl8366rb.c
> head/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h
>
> Modified: head/sys/dev/etherswitch/rtl8366/rtl8366rb.c
> ==============================================================================
> --- head/sys/dev/etherswitch/rtl8366/rtl8366rb.c Tue Jul 1 14:12:59 2014 (r268092)
> +++ head/sys/dev/etherswitch/rtl8366/rtl8366rb.c Tue Jul 1 14:33:48 2014 (r268093)
> @@ -570,6 +570,7 @@ rtl_getport(device_t dev, etherswitch_po
> return (err);
> } else {
> /* fill in fixed values for CPU port */
> + p->es_flags |= ETHERSWITCH_PORT_CPU;
> ifmr->ifm_count = 0;
> smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK);
> v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2));
> @@ -606,6 +607,8 @@ rtl_setport(device_t dev, etherswitch_po
> RTL8366RB_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
> if (err)
> return (err);
> + if (p->es_port == RTL8366RB_CPU_PORT)
> + return (0);
> mii = device_get_softc(sc->miibus[p->es_port]);
> ifm = &mii->mii_media;
> err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA);
>
> Modified: head/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h
> ==============================================================================
> --- head/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h Tue Jul 1 14:12:59 2014 (r268092)
> +++ head/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h Tue Jul 1 14:33:48 2014 (r268093)
> @@ -168,9 +168,10 @@
> (RTL8366RB_PACR | (1 << (((phy) & 0x1f) + 9)) | (((page) & 0xf) << 5) | ((reg) & 0x1f))
>
> /* general characteristics of the chip */
> -#define RTL8366RB_NUM_PORTS 6
> -#define RTL8366RB_NUM_PHYS (RTL8366RB_NUM_PORTS-1)
> -#define RTL8366RB_NUM_VLANS 16
> -#define RTL8366RB_NUM_PHY_REG 32
> +#define RTL8366RB_CPU_PORT 5
> +#define RTL8366RB_NUM_PORTS 6
> +#define RTL8366RB_NUM_PHYS (RTL8366RB_NUM_PORTS-1)
> +#define RTL8366RB_NUM_VLANS 16
> +#define RTL8366RB_NUM_PHY_REG 32
>
> #endif
>
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