eventtimer issue on mips: temporary workaround

[Juli Mallett]

On Wed, Sep 28, 2011 at 23:41, Jayachandran C. <c.jayachandran at gmail.com> wrote:
> the amd implementation seems to be using the STI instruction to enable
> interrupts - but I'm not able to see how to avoid this race condition
> on platforms which does not have a similar instruction.

If I'm understanding right, that's much of the thrust of the problem.
I mean, we can check whether a non-masked interrupt was asserted
before doing the wait, but there's still a window between that and the
wait.  It sounds like we need a conditional wait instruction, which is
to say it sounds like the code does need a rethink for MIPS (although
why "wait" wouldn't return immediately if there's a non-masked
interrupt asserted is beyond me.)  But I'm still somewhat confused by
the original post, so may be missing the mark on that.