projects/mips merged into head
M. Warner Losh
imp at bsdimp.com
Tue Jan 12 20:07:05 UTC 2010
The base/projects/mips branch has been merged into base/head. The
merge is complete and the sanity tests have passed. The code has
booted on both a Ubiquiti RouterStation (big endian) as well as in
gxemul (little endian).
The branch lived for one year, minus a day, and accumulated much work:
o A new port to the Atheros AR71xx series of processors. This
port supports the RouterStation and RouterStation PRO boards
from Ubiquiti. Other boards should work with minimal
tweaking. This port should be considered as nearing
production quality, and has been used extensively by the
developers. The primary author of this port is Oleksandr
Tymoshenko (gonzo at freebsd.org).
o A new port to the sibyte BCM1250 SoC on the BCM91250
evaluation board (aka SWARM). This port is reported to be
stable, but this hardware is a little old and not widely
available. The primary author of this port is Neel Natu
(neel at freebsd.org). Only one core is presently supported.
o A port, donated by Cavium, to their Octeon and Octeon plus
series of SoC (CN3xxx and CN5xxx). This code is
preliminary, supporting only a single core right now. It
has been lightly tested on the CN3860 evaluation board only
in 32-bit mode. Warner Losh (imp at freebsd.org) has been
driving the efforts to get this code into the tree.
o A port, donated by RMI, to their XLR series of SoCs. This
port is single core only as well. The code reaches
multi-user but should be considered beta quality for the
moment. Randal Stewart (rrs at freebsd.org) has been driving
the efforts to integrate this into the tree.
o Preliminary support for building a mips64 kernel from this
source base. More work is needed here, but at least two
kernels successfully build in 64-bit mode (OCTEON1 and
MALTA64).
o Very early support for N32 and N64 ABIs
o Support for booting compressed kernels has been added
(gonzo@).
o Improved support for debugging
o Improved busdma and bus_space support
o Many bug fixes
o More types of MIPS cores are recognized
o Expanded cache handling for newer processors
o Beginning of a port to the alchemy au1XXX cpus is present,
but experimental.
o Work on SMP is underway to support multicore processors like
the sibyte, Octeon and XLR processors.
I'm sure there are minor items I've forgotten. If so, please forgive
any omission on my part...
The branch had been updated incorrectly several times over the past
year, and the damage was too much to repair. We've retired the branch
and will do further mips development in "head" for the time being.
If you have a checked out tree, the suggested way to update the
projects/mips tree you have is to do a "svn switch
svn://svn.freebsd.org/base/head" in that tree.
I'd like to thank everybody that has contributed time, code or
hardware to make FreeBSD/mips better.
We are still investigating how feasible merging all this work into
stable/8 will be, as it represents a huge leap forward in code
stability and quality.
As development proceeds, I'll keep posting updates. In addition, I
hope to have some mini "how-to" wiki pages done for people that want
to try it out.
Warner
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