svn commit: r210846 - in head/sys/mips: include mips

[Alan Cox]

On 08/05/2010 09:25, Jayachandran C. wrote:
> On Thu, Aug 5, 2010 at 4:26 PM, Jayachandran C.
> <c.jayachandran at gmail.com>  wrote:
>    
>> On Thu, Aug 5, 2010 at 11:43 AM, Alan Cox<alc at cs.rice.edu>  wrote:
>>      
>>> Just an observation ...
>>>
>>> Jayachandran C. wrote:
>>>        
>>>> Author: jchandra
>>>> Date: Wed Aug  4 14:12:09 2010
>>>> New Revision: 210846
>>>> URL: http://svn.freebsd.org/changeset/base/210846
>>>>
>>>> Log:
>>>>   Add 3 level page tables for MIPS in n64.
>>>>     - 32 bit compilation will still use old 2 level page tables
>>>>   - re-arrange pmap code so that adding another level is easier
>>>>   - pmap code for 3 level page tables for n64
>>>>   - update TLB handler to traverse 3 levels in n64
>>>>     Reviewed by:        jmallett
>>>>          
>>> MIPS doesn't really need to use atomic_cmpset_int() in situations like this
>>> because the software dirty bit emulation in trap.c acquires the pmap lock.
>>>   Atomics like this appear to be a carryover from i386 where the
>>> hardware-managed TLB might concurrently set the modified bit.
>>>        
>> Then I guess we should be able to use *pte directly, without pbits,
>> obits and the retry loop.
>> Will try this change...
>>      
> Can you have a look at the attached patch and see if it is okay?  This
> has the above changes, and I have attempted to fix the other issue you
> had reported on wired mapping count too.
>
>    

The patch looks good.

> There are a few calls for loadandclear() on pte too, with pmap lock
> held, can this be avoided too?
>
>    

I haven't looked at them, but almost certainly yes.

Alan