PCI IDE Controller Base Address Register setting

[Darmawan Salihun]

Hi,

--- On Sat, 1/1/11, Darmawan Salihun <darmawan_salihun at yahoo.com> wrote:

> From: Darmawan Salihun <darmawan_salihun at yahoo.com>
> Subject: Re: PCI IDE Controller Base Address Register setting
> To: "John Baldwin" <jhb at freebsd.org>
> Cc: freebsd-hackers at freebsd.org
> Date: Saturday, January 1, 2011, 2:58 PM
...
> > Thanks, I tested this option and it worked. 
> > I could see the debugging messages. 
> > 
> > FreeBSD cannot detect the disk in all of the IDE
> > interfaces.  
> > (The AMDCS5536 only implemented the primary channel)
> > 
> > Anyway, I manage to change the mapping in BAR4 of the
> IDE
> > controller. 
> > However, I'm confused as to how to "force" FreeBSD to
> > recognize the 
> > IDE controller to work only in compatibility mode. 
> > Because, I'm not sure if the physical IDE controller
> chip
> > supports 
> > Native-PCI mode correctly at all. 
> > If I set BAR4 to "disabled"(i.e. not decoding any I/O
> > addresses at all), 
> > would FreeBSD use compatibility mode? or would it
> consider
> > the 
> > IDE controller not present?
> > 
> > Here's some notes about the IDE controller PCI
> > configuration registers:
> > 1. The Programming Interface register contains 80h
> (which
> > means _only_ 
> > compatibility mode supported). I have yet to be able
> to
> > write new values 
> > into this register. That's the state of the register
> right
> > now. 
> > I noticed in your previous reply that for FreeBSD to
> be
> > forced to use 
> > compatibility mode, the programming interface register
> bits
> > in the PCI configuration register must be set
> accordingly 
> > (I suppose the bits in the lower nibble).
> > 
> > 2. BAR0-BAR3 cannot be changed and contains 00h. 
> > I have yet to experiment with BAR5.The default value
> is
> > 00h
> > 
> 
> Silly me that I didn't know about the SFF-8038i standard 
> (PCI IDE Bus mastering). So, I found out that it seems the
> 
> allocation of I/O ports for the IDE controller is just
> fine. 
> However, the primary IDE channel is shared between 
> an IDE interface  and a CF card. Moreover, Linux
> detects 
> DMA bug, because all drives connected to the interface
> would be 
> in PIO mode :-/
> If all drives on the primary channel are "forced" to PIO
> mode, then 
> shouldn't the "IDE PCI bus master register" (offset 20h per
> SFF-8038i)
> along with the command register (offset 4h), are set to
> indicate the 
> controller doesn't support bus mastering? 
> 

Anyway, is it possible for devices on _the same_ channel to use 
different setting in FreeBSD? For example, the primary slave 
is using UDMA66 while the primary master is using PIO-4.
Or such configuration is considered invalid.  
The AMDLX800-CS5536 board I'm working with has different connectors 
for the primary master and primary slave. Moreover, the chipset 
supports different setting in primary master and primary slave. 

TIA, 

Darmawan