TL-WR1043: switch

[Stefan Bethke]

Am 12.12.2011 um 11:28 schrieb Adrian Chadd:

>> The RTL8366 family of switches has a GMII interface to hook up an ethernet controller.  MDC/MDIO are not connected to the ethernet controller, instead register access is through this I2C-like interface, which on the TL-WR1043ND is through two GPIOs.
> 
> Right. So all the PHY access/glue has to come out of this i2c style bus.
> 
>> The RTL8306SD (which is used for example in the Linksys WRT160NL) has two MII ports. One is always used to connect a CPU, while the second one can be configured to either communicate with the switch or with one specific PHY.
> 
>> I believe the WRT160NL uses the latter mode, using the first ethernet port of the CPU to talk to the switch ("LAN"), and the second one to the PHY ("WAN"). It exposes both the five PHYs via MDC/MDIO, as well as switch configuration.  Unfortunately, the configuration registers are spread out over all the PHYs, so you can't cleanly isolate the PHYs from the switch portion.  Since the switch has only one set of MDC/MDIO, both ethernet controllers share the same minibus (and both driver instances need to work on just the one instance).  For arge1, using the appropriate phymask should be sufficient.
> 
> Right. This I think is one of those places where it gets ugly.

I've looked at the miibus code a bit more, and I think it's necessary to decide about the (implied) semantics.

With a standard Ethernet card, you have the MAC, a MDC/MDIO bus, and one or more PHYs connected to the MAC.  Our current miibus seems to work with this model, and assumes that only one PHY can be active at any time, which makes sense if there's only a single MAC.

With the switch controllers, these assumptions are not correct anymore.  We still have multiple PHYs that are connected to one MDC/MDIO bus, but the MII lines are not shared between the switch MACs and the PHYs, as there's a one-to-one relationship between MACs and PHYs. (Ignoring the complications of reconfigurable ports for the moment.)

My current thinking is that there should be an miibus instance per switch port, with a single PHY attached to it.  All these miibus instances talk to the same MDC/MDIO interface, but attach only one of the PHYs accessible through it.  I haven't checked what locking implications this has on the miibus_if device (usually the Ethernet driver).

For my RTL8366RB, that's straight-forward to implement.  For the PHY switch controllers like the RTL8306SD the miibusses should be split between the MAC (for the "WAN" port) and the switch (for the "LAN" ports).  I'm not sure when and where these additional busses would be instantiated and probed.

The miibus code also assumes that it is always attached to something that has a struct ifnet.  In my RTL8366RB driver, I'm creating one myself, but I'm not sure what side effects this might have.


Stefan

-- 
Stefan Bethke <stb at lassitu.de>   Fon +49 151 14070811