TL-WR1043: switch

[Stefan Bethke]

Am 03.12.2011 um 22:36 schrieb Stefan Bethke:

> Am 03.12.2011 um 16:47 schrieb Adrian Chadd:
> 
>> Hi,
>> 
>> Initial comments (yes, I broke my own rule..)
>> 
>> * Don't get rid of SCL_PIN / SDA_PIN: instead rename them to
>> blah_PIN_DEFAULT, and use those defines instead of hardcoding 0 and 1.
>> I have a "thing" for avoiding hard-coded constants, and this makes it
>> more obvious that those 0/1 values are pins rather than true/false.
>> * We should break this out into separate diffs - let's focus right now
>> on fixing/extending the i2c bus code to work with the "strict" flag
>> you've introduced.  The rest of the diff is GPIO stuff. That way we
>> can commit it in two parts.
> 
> http://www.lassitu.de/freebsd/iicbus-optional-relaxed-bus-semantics.patch

I've updated the patch.

>> Stuff to look at later:
>> 
>> * The gpio default stuff is fine (but luis has send me some alternate
>> hint code to look at too!) - however, the capabilities are either in
>> or out. What about pullup, pulldown, etc?
> 
> I'd be happy to review and test luis' code.
> 
> The code that I added does instantiate each pin with DEFAULT_CAPS (read and write), sets the name and sets the pin to either read or write.  From ar71xx_gpio.c and ar71xxreg.h it seems that these devices only support input and output and no other modes.

My latest version of the patch is in http://www.lassitu.de/freebsd/ar71xx_gpio-configure-by-hint.patch

> 
>> * Is there any way to make that "configure GPIO from hint" function
>> generic? Or should we worry about that later on? (eg so the rt305x CPU
>> support from ray@ can also use this?)
> 
> sys/dev/gpio/gpiobus.c has no method to set the pin capabilities, only to report the ones the underlying device offers.  So every driver needs to do it's confuration itself.  The code itself certainly could be factored out.
> 
>> And my final question:
>> 
>> Does this actually now work for mainipulating the switch phy? If so:
>> 
>> * how does it work;
> 
> I have a userland program that can read and write switch registers (and PHY registers through that interface).  See below.
> 
>> * do we get per-physical-switch-port statistics somehow?
> 
> They're there, and the OpenWrt driver has code to read them.  I haven't gotten round to implement that.
> 
>> * how do I tinker with it next week when I'm over in Melbourne,
>> talking about this stuff to a group of researchers that want to use
>> the 1043nd? :)

With the code from tonight at http://www.lassitu.de/freebsd/rtl8366ctl.tbz, and all three patches from http://www.lassitu.de/freebsd/, I can do this:

# rtl8366ctl info
RTL8366RB rev: 3
MTU:           9216
Storm control: disabled
VLAN:          off
# rtl8366ctl port
port speed dupl neg. learn aging VLAN
0:   1000bT-FDX auto              0
1:   1000bT-FDX auto              0
2:   no link                      0
3:   no link                      0
4:   no link                      0
5:   1000bT-FDX                   0
# rtl8366ctl phy info
PHY  EUI:ver.rev  link caps
0    000732:22.1  100bTX-FDX 100bTX 10bTX-FDX 10bTX 1000bTX-FDX
1    000732:22.1  100bTX-FDX 100bTX 10bTX-FDX 10bTX 1000bTX-FDX 1000bTX
2    000732:22.1 
3    000732:22.1 
4    000732:22.1 
# rtl8366ctl vlan
VLAN  VID  PCP  FID   0  1  2  3  4  5
   0    1    0    0   #  #  #  #  #  #  
   1    2    0    0   -  -  -  -  -  -  
   2    3    0    0   -  -  -  -  -  -  
   3    4    0    0   -  -  -  -  -  -  
   4    5    0    0   -  -  -  -  -  -  
   5    6    0    0   -  -  -  -  -  -  
   6    7    0    0   -  -  -  -  -  -  
   7    8    0    0   -  -  -  -  -  -  
   8    9    0    0   -  -  -  -  -  -  
   9   10    0    0   -  -  -  -  -  -  
  10   11    0    0   -  -  -  -  -  -  
  11   12    0    0   -  -  -  -  -  -  
  12   13    0    0   -  -  -  -  -  -  
  13   14    0    0   -  -  -  -  -  -  
  14   15    0    0   -  -  -  -  -  -  
  15   16    0    0   -  -  -  -  -  -  

This is with the power on default.

I can now set up a sensible VLAN config for port 1-4 LAN, port 0 WAN and port 5 (CPU) as member of LAN plus tagged member of WAN:
# rtl8366ctl portvlan 0=1
0=1
# rtl8366ctl portvlan 5=0,1t
5=0,1t
# rtl8366ctl vlan
VLAN  VID  PCP  FID   0  1  2  3  4  5
   0    1    0    0   -  #  #  #  #  #  
   1    2    0    0   #  -  -  -  -  T  
   2    3    0    0   -  -  -  -  -  -  
   3    4    0    0   -  -  -  -  -  -  
   4    5    0    0   -  -  -  -  -  -  
   5    6    0    0   -  -  -  -  -  -  
   6    7    0    0   -  -  -  -  -  -  
   7    8    0    0   -  -  -  -  -  -  
   8    9    0    0   -  -  -  -  -  -  
   9   10    0    0   -  -  -  -  -  -  
  10   11    0    0   -  -  -  -  -  -  
  11   12    0    0   -  -  -  -  -  -  
  12   13    0    0   -  -  -  -  -  -  
  13   14    0    0   -  -  -  -  -  -  
  14   15    0    0   -  -  -  -  -  -  
  15   16    0    0   -  -  -  -  -  -  

I've started looking into Alexsandrs code.  I have a couple of questions, but I think I can make my code work as a switch driver and integrate it into that framework.


Stefan

-- 
Stefan Bethke <stb at lassitu.de>   Fon +49 151 14070811