NVMe driver init sequence

Kinjal Patel Kinjal.Patel at taec.toshiba.com
Thu Aug 17 20:54:17 UTC 2017


Hi,

I have a query on NVMe driver init sequence in FreeBSD 10.3(stable).

The driver init sequence is,

1)      Enable controller (CC.EN=1)

2)      Wait for controller ready (CSTS.RDY=1)

3)      Set PCI bus master enable (BME=1)

As per NVMe spec, when NVMe controller becomes ready it has to process command.

"Enable (EN): When set to '1', then the controller shall process commands based on Submission Queue Tail doorbell writes"

And per PCI Express spec when BME is not set, the PCI Express Function is not allowed to issue any Memory or I/O requests.
"Bus Master Enable - Controls the ability of a PCI Express Endpoint to issue Memory95 and I/O Read/Write Requests, and
the ability of a Root or Switch Port to forward Memory and I/O Read/Write Requests in the Upstream direction"

Enabling controller before setting BME=1 is violation of spec, as controller has to accept commands but BME is prerequisite for that.

The Linux device driver init sequence is,

1)     Set PCI bus master enable (BME=1)

2)     Enable Controller (CC.EN=1)

3)     Wait for controller ready (CSTS.RDY=1)

The FreeBSD NVMe driver sequence should be changed to set BME=1 before attempting to enable controller.


Regards,
Kinjal Patel


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