Makefile and nested variables question

[Bryan Drewery]

On 2/9/2018 9:02 AM, Johannes Lundberg wrote:
> Hi
> 
> Is there some way to use nested variables in the dependency line like so:
> 
> ${OBJS}: ${${.TARGET:S/$/_DEPS/}}
> 
> In my case I get nothing..
> 

I think I need more details. That line won't work. ${.TARGET} is only
defined *in a running target*, not while declaring dependencies.

If these OBJS are C files then this syntax may be enough to only declare
the dependencies when really needed.
  OBJS_DEPEND_GUESS.foo.o += bar.h bar.c
Rather than what I think you tried:
  foo.o_DEPS += bar.h bar.c

If you want them declared always (ignoring .depend files) then just:
  foo.o: bar.h bar.c

-- 
Regards,
Bryan Drewery

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