RPi4B's DMA11 (DMA4 engine example) vs. xHCI/pcie
Mark Millard
marklmi at yahoo.com
Tue Sep 29 01:30:02 UTC 2020
[Be warned that the material is not familiar so I may need
educating. THis is based ont he example context that I
happen to have around.]
In the u-boot fdt print / output there are 2 distinct sets of dma channel
information, 1 for soc and 1 for scb, where the dma_tag values for the two
sets should be distinct as far as I can tell:
U-Boot> fdt address 0x7ef1000
U-Boot> fdt print /
/ {
. . .
soc {
dma at 7e007000 {
compatible = "brcm,bcm2835-dma";
reg = <0x7e007000 0x00000b00>;
interrupts = * 0x0000000007ef645c [0x00000084];
interrupt-names = "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7", "dma8", "dma9", "dma10";
#dma-cells = <0x00000001>;
brcm,dma-channel-mask = <0x000001f5>;
phandle = <0x0000000b>;
};
scb {
. . .
dma at 7e007b00 {
compatible = "brcm,bcm2711-dma";
reg = <0x00000000 0x7e007b00 0x00000000 0x00000400>;
interrupts = <0x00000000 0x00000059 0x00000004 0x00000000 0x0000005a 0x00000004 0x00000000 0x0000005b 0x00000004 0x00000000 0x0000005c 0x00000004>;
interrupt-names = "dma11", "dma12", "dma13", "dma14";
#dma-cells = <0x00000001>;
brcm,dma-channel-mask = <0x00007000>;
phandle = <0x0000003d>;
};
. . .
So, 0 through 10 need the soc criteria (mix of DMA and DMA LITE engine criteria)
and 11 through 14 need the scb criteria (DMA4 engine criteria). (I'm ignore
dma-channel-mask's at this point.)
I'll here note the code has:
#define BCM_DMA_CH_MAX 12
for use in code like:
/* setup initial settings */
for (i = 0; i < BCM_DMA_CH_MAX; i++) {
ch = &sc->sc_dma_ch[i];
bzero(ch, sizeof(struct bcm_dma_ch));
ch->ch = i;
ch->flags = BCM_DMA_CH_UNMAP;
if ((bcm_dma_channel_mask & (1 << i)) == 0)
continue;
. . .
It looks to me like the only scb/DMA4-engine "dma11" is covered
by such loops and that the "brcm,dma-channel-mask = <0x00007000>"
means that dma11 will not be used.
So: No scb/DMA4 engine will be used??? (That could explain the
1 GiByte limit?)
rpi_DATA_2711_1p0.pdf reports that soc/0-10 have 2 types (0-6 vs. 7-10
as it turns out) as well as the scb/DM4-engines (11-14):
QUOTE (with omitted marked by ". . .")
. . .
The BCM2711 DMA Controller provides a total of 16 DMA channels. Four of these are DMA Lite channels (with reduced performance and features), and four of them are DMA4 channels (with increased performance and a wider address range).
. . .
4.5. DMA LITE Engines
Several of the DMA engines are of the LITE design. This is a reduced specification engine designed to save space. The engine behaves in the same way as a normal DMA engine except for the following differences:
. . .
• The DMA length register is now 16 bits, limiting the maximum transferable length to 65536 bytes.
. . .
4.6. DMA4 Engines
Several of the DMA engines are of the DMA4 design. These have higher performance due to their uncoupled read/write design and can access up to 40 address bits. Unlike the other DMA engines they are also capable of performing write bursts. Note that they directly access the full 35-bit address bus of the BCM2711 and so bypass the paging registers of the DMA and DMA Lite engines.
DMA channel 11 is additionally able to access the PCIe interface.
END QUOTE
The register map indicates (with some extra notes added):
0-6: DMA
7-10: DMA LITE (65536 bytes limit, for example)
11-14: DMA4 (11 is special relative to "PCIe interface")
("DMA Channel 15 is exclusively used by the VPU.")
Yet what I see in the head -r365932 code is:
#define BCM_DMA_CH_MAX 12
. . .
struct bcm_dma_softc {
device_t sc_dev;
struct mtx sc_mtx;
struct resource * sc_mem;
struct resource * sc_irq[BCM_DMA_CH_MAX];
void * sc_intrhand[BCM_DMA_CH_MAX];
struct bcm_dma_ch sc_dma_ch[BCM_DMA_CH_MAX];
bus_dma_tag_t sc_dma_tag;
};
. . .
err = bus_dma_tag_create(bus_get_dma_tag(dev),
1, 0, BUS_SPACE_MAXADDR_32BIT,
BUS_SPACE_MAXADDR, NULL, NULL,
sizeof(struct bcm_dma_cb), 1,
sizeof(struct bcm_dma_cb),
BUS_DMA_ALLOCNOW, NULL, NULL,
&sc->sc_dma_tag);
As an example: does that deal with the likes of DMA LITE (so 7-10) "limiting
the maximum transferable length to 65536 bytes"?
As another example: Does it deal with the DMA4 (11-14) distinctions (if
such were in use anyway)?
For reference from the fdt print / :
/ {
. . .
#address-cells = <0x00000002>;
#size-cells = <0x00000001>;
. . .
soc {
compatible = "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
. . .
dma-ranges = <0xc0000000 0x00000000 0x00000000 0x40000000>;
. . .
firmware {
compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
mboxes = <0x0000001c>;
dma-ranges;
. . .
emmc2bus {
compatible = "simple-bus";
#address-cells = <0x00000002>;
#size-cells = <0x00000001>;
. . .
dma-ranges = <0x00000000 0xc0000000 0x00000000 0x00000000 0x40000000>;
. . .
scb {
compatible = "simple-bus";
#address-cells = <0x00000002>;
#size-cells = <0x00000002>;
. . .
dma-ranges = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0xfc000000 0x00000001 0x00000000 0x00000001 0x00000000 0x00000001 0x00000000>;
. . .
pcie at 7d500000 {
compatible = "brcm,bcm2711-pcie";
. . .
#address-cells = <0x00000003>;
. . .
#size-cells = <0x00000002>;
. . .
dma-ranges = <0x02000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0xc0000000>;
. . .
v3dbus {
compatible = "simple-bus";
#address-cells = <0x00000001>;
#size-cells = <0x00000002>;
. . .
dma-ranges = <0x00000000 0x00000000 0x00000000 0x00000004 0x00000000>;
. . .
===
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)
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