Comment #135 for bugzilla 237666 : a USB3-handling problem with a investigatory fix for a cortex-a72 context

[Hans Petter Selasky]

On 2020-09-19 21:36, Mark Millard wrote:
> # svnlite diff /usr/src/sys/dev/usb/controller/xhci.c
> Index: /usr/src/sys/dev/usb/controller/xhci.c
> ===================================================================
> --- /usr/src/sys/dev/usb/controller/xhci.c	(revision 363590)
> +++ /usr/src/sys/dev/usb/controller/xhci.c	(working copy)
> @@ -441,6 +441,9 @@
>   
>   	DPRINTF("ERSTBA(0)=0x%016llx\n", (unsigned long long)addr);
>   
> +#ifdef __aarch64__
> +__asm __volatile("dsb st" : : : "memory");
> +#endif
>   	XWRITE4(sc, runt, XHCI_ERSTBA_LO(0), (uint32_t)addr);
>   	XWRITE4(sc, runt, XHCI_ERSTBA_HI(0), (uint32_t)(addr >> 32));
>   
> booted just fine. This is what I expected relative to
> initializing for the event ring.

Can you replace this with a USB flush call?

> Index: xhci.c
> ===================================================================
> --- xhci.c	(revision 365238)
> +++ xhci.c	(working copy)
> @@ -432,6 +432,8 @@
>  	phwr->hwr_ring_seg[0].qwEvrsTablePtr = htole64(addr);
>  	phwr->hwr_ring_seg[0].dwEvrsTableSize = htole32(XHCI_MAX_EVENTS);
>  
> +	usb_bus_mem_flush_all(&sc->sc_bus, &xhci_iterate_hw_softc);
> +
>  	DPRINTF("ERDP(0)=0x%016llx\n", (unsigned long long)addr);
>  
>  	XWRITE4(sc, runt, XHCI_ERDP_LO(0), (uint32_t)addr);

--HPS