ucontext

[Ian Lepore]

On Fri, 2019-10-25 at 17:49 +0300, Konstantin Belousov wrote:
> On Fri, Oct 25, 2019 at 08:26:19AM -0600, Ian Lepore wrote:
> > On Fri, 2019-10-25 at 11:38 +0300, Konstantin Belousov wrote:
> > > On Fri, Oct 25, 2019 at 10:44:21AM +0300, Nick Kostirya wrote:
> > > > On Thu, 24 Oct 2019 17:54:36 +0300
> > > > Konstantin Belousov <kostikbel at gmail.com> wrote:
> > > > 
> > > > > 
> > > > > I believe you want
> > > > > 	uc_context.__gregs[_REG_PC]
> > > > > on arm (32bit) and
> > > > > 	uc_context.mc_gpregs.gp_elr
> > > > > on arm64 for aarch64.
> > > > > 
> > > > > Sometimes the thumb bit (lowest bit in PC) leaks there, then
> > > > > you should
> > > > > mask it.
> > > > 
> > > > Thanks!
> > > > 
> > > > Although I did not understand your last phrase.
> > > > There is leak of what?
> > > 
> > > Leak of the thumb bit.  ARM ARM specifies that in non-thumb mode,
> > > pc must
> > > be word-aligned, in thumb it is half-word aligned.  A way to
> > > enter thumb
> > > mode is to execute BX or BLX instruction with the lowest bit of
> > > the target
> > > PC set to 1.
> > > 
> > > Sometimes you might get pc with the bit 0 set, which should
> > > be masked out then.  This is a bigger issue for unwinders than
> > > for simple
> > > profilers.
> > > 
> > > > Where can I read about it?
> > > 
> > > ARM ARM (ARM architecture reference manual), available from
> > > arm.com.
> > > Or Google for it.
> > > 
> > 
> > The kernel has some support for running thumb binaries, but I've
> > never
> > heard of anybody actually doing so on freebsd.  Nobody has ever
> > reported a bug related to running a thumb binary, and it would be
> > astounding to me if we accidentally got everything in the kernel
> > thumb
> > support right on the first try without ever testing it.
> 
> I am curious as well, isn't thumb completely transparent to the
> kernel ?
> I.e. my impression was that some code might be compiled into thumb,
> and
> then a thunk which does BX to the location, is used to switch to
> thumb
> mode.  There is no new ELF machine type involved, or different
> exception
> entry mode, so it should just work ?
> 
> And this is why I remember about this bit 0 issue, it caused some
> problems
> to libunwind on arm.
> 

I think in the kernel it would appear in places like page fault
handlers needing to mask off the lower bit.

-- Ian