Choose between Raspberry Pi 4B 4GB and ROCKPro64

[Klaus Küchemann]

Ian Lepore-3 wrote
> On Wed, 2019-11-13 at 17:48 +0100, Bernd Walter wrote:
>> I just remembered that I own an FTDI FT4232H module.
>> This one is capable of 12Mbps with 2k Buffers and high speed USB.
>> I have it at a different location - guess I will have to drive and
>> pick it up.
> 
> You'll certainly have no trouble with the ftdi 4232.  I've tested those
> at 6mpbs in both directions concurrently without any data loss.
> 
> IMO, breaking free of the 115200 barrier is long overdue, but it would
> have been nice if the step up everyone took was to 921600, because
> virtually all usb-serial support that.  With line-level rather than
> ttl-level adapters, 1mpbs is often the effective speed limit because of
> the cheap rs232 line-level chips they use.
> 
> -- Ian
> 
> 
> 
> absolutely true :-)
> I have been given a special version which is able to handle nearly every
> cheapest USB-UART fished out of the trash can :-) :
> ---
>  ttys005
> kls@ ~ % sudo minicom -D /dev/tty.usbserial-1420 -b 115200 8N1
> Password:
> 
> Welcome to minicom 2.7.1
> 
> OPTIONS: 
> Compiled on Oct  6 2019, 23:16:03.
> Port /dev/tty.usbserial-1420, 21:45:27
> 
> Press CTRL-A Z for help on special keys
> 
> 
> U-Boot TPL 2019.10-dirty (Oct 12 2019 - 14:09:09)
> con reg        
> cru , cic , grf , sgrf , pmucru , pmu 
> Starting SDRAM initialization...
> sdram_init: data trained for rank 1, ch 0
> sdram_init: data trained for rank 1, ch 1
> Channel 0: LPDDR4, 50MHz
> BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
> Channel 1: LPDDR4, 50MHz
> BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
> 256B stride
> lpddr4_set_ctl: channel 0 training pass
> lpddr4_set_ctl: channel 1 training pass
> lpddr4_set_rate: change freq to 400 mhz 0, 1
> lpddr4_set_ctl: channel 0 training pass
> lpddr4_set_ctl: channel 1 training pass
> lpddr4_set_rate: change freq to 800 mhz 1, 0
> Finish SDRAM initialization...
> Trying to boot from BOOTROM
> Returning to boot ROM...
> 
> U-Boot SPL 2019.10-dirty (Oct 12 2019 - 14:09:09 -0400)
> Trying to boot from MMC1
> NOTICE:  BL31: v2.1(debug):2.1
> NOTICE:  BL31: Built : 10:16:34, Sep 27 2019
> INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized
> in EL3
> INFO:    plat_rockchip_pmu_init(1596): pd status 3e
> INFO:    BL31: Initializing runtime services
> WARNING: BL31: cortex_a53: CPU workaround for 819472 was missing!
> WARNING: BL31: cortex_a53: CPU workaround for 824069 was missing!
> WARNING: BL31: cortex_a53: CPU workaround for 827319 was missing!
> INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied
> INFO:    BL31: Preparing for EL3 exit to normal world
> INFO:    Entry point address = 0x200000
> INFO:    SPSR = 0x3c9
> 
> 
> U-Boot 2019.10-dirty (Oct 12 2019 - 14:09:09 -0400)
> 
> Model: Pine64 RockPro64
> DRAM:  rk3399_dmc_probe: pmugrf = 00000000ff320000
> 3.9 GiB
> ...
> 
> ---
> -- Klaus
> 
> 
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