[RPI-B] [HEADS UP] DWC OTG TX path optimisation for 11-current

[Hans Petter Selasky]

On 07/30/15 17:22, Svatopluk Kraus wrote:
> Well, I'm trying to join answers for your previous emails in this one.
>
> On Thu, Jul 30, 2015 at 2:38 PM, Hans Petter Selasky <hps at selasky.org> wrote:
>> On 07/30/15 14:28, Hans Petter Selasky wrote:
>>
>> Can you run only "usbdump" while the interface is UP and the errors are printed in the console?
>>
>> We are looking for ERR different from "0".
>
>
> It looks that there is no ERR different from "0" in usbdump at all.
> Again, it looks that the load is generated "internally" and it does
> not depend on explicit usb request directly.
>
>>
>> Does the interface come back when you down/up it?
>
> Yes, it works.
>
>> BTW: All your USB HUBs are self powered?
>
> Yes, my usb hub has external power supply (12V, 4A) and my usb disk is
> connected only.
>
>>
>> Does the device recover if you do:
>>
>> usbconfig -d X.Y reset
>>
>> for the ue0 ?
>
> Yes, it does.
>
>
> Anyhow, I think that I figured out why the system has so slow response
> time when it's triggered. In general, it's not good idea to not limit
> somehow interrupt filter execution time. If something wrong is
> happening, then such filter can halt all system. I can get back fast
> system response time with attached patch. Note that it's only a
> proof-of-concept patch and it does not remove the problem. There is
> still something what generates big load when it's triggered even if
> system is 99% idle after trigger was pulled.
>
> Svata
>

Hi,

Your patch looks OK, though I would really like to know why the repeat 
statement is looping. Does the following patch make any difference for you?

> Index: sys/dev/usb/controller/dwc_otg.c
> ===================================================================
> --- sys/dev/usb/controller/dwc_otg.c	(revision 286002)
> +++ sys/dev/usb/controller/dwc_otg.c	(working copy)
> @@ -579,6 +579,9 @@
>  	sc->sc_irq_mask |= GINTMSK_RXFLVLMSK;
>  	DWC_OTG_WRITE_4(sc, DOTG_GINTMSK, sc->sc_irq_mask);
>
> +	/* clear RX FIFO level interrupt */
> +	DWC_OTG_WRITE_4(sc, DOTG_GINTSTS, GINTMSK_RXFLVL);
> +
>  	/* clear cached status */
>  	sc->sc_last_rx_status = 0;
>  }

--HPS