ARM counter registers and get_cyclecount()

[Mark Robert Vaughan Murray]

On 21 Oct 2013, at 00:58, Ian Lepore <ian at FreeBSD.org> wrote:

>>> There are other complexities that come to mind... things like clocks
>>> that run slower or even stop in power-saving modes, is that a problem?
>> 
>> Yup :-(. But if its fast and the highest-resolution non-quantised timing available, I guess I'll use it. What I don't want is numbers with lots of low bits being non random/skipped; I'd rather have a slower counter still incrementing from the bottom bit up. If its running at CPU/Instruction clock speed, it will do.
>> 
>> M
> 
> On the very newest arm boards I have there are counters that can run as
> fast as 66 MHz (cpu runs at 800-1000 MHz).  That's by far the fastest
> I've seen yet.  On older boards it's likely to be a few MHz at best.

Yuk :-(. I was hoping for some approximation to 1-increment-per-instruction
or close.

> It's a pity you don't think the names are important.  IMO, the names of
> things are at least as important as the implementation (and often more
> so, because they're harder to change and that puts a greater premium on
> getting them right).

I don't think its unimportant; I think it is another thread of conversation. Right now i'm looking for a working counter with the right physical characteristics. What name the beastie gets will likely be apparent when its found/written.

M
-- 
Mark R V Murray

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