Detecting USB devices at startup?

[Krassimir Slavchev]

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Bernd Walter wrote:
> On Mon, Nov 05, 2007 at 03:28:55PM +0200, Krassimir Slavchev wrote:
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>> Hi,
>>
>> I have strange problem with my at91rm9200 board.
>>
>> At boot I get:
>> ...
>> ohci0: <AT91 integrated ohci controller> mem 0xdfe00000-0xdfefffff irq
>> 23 on atmelarm0
>> ohci0: [GIANT-LOCKED]
>> ohci0: [ITHREAD]
>> uhub0: 2 ports with 2 removable, self powered
>> usbd_get_config_desc: confidx=0, bad desc len=9 type=36
>> uhub_explore: usb_new_device failed, error=INVAL
>> uhub0: device problem (INVAL), disabling port 1
>> usb_new_device: set address 2 failed - trying a port reset
>> usb_new_device: set address 2 failed - trying a port reset
>> usbd_new_device: addr=2, getting first desc failed
>> uhub_explore: usb_new_device failed, error=IOERROR
>> uhub0: device problem (IOERROR), disabling port 2
>>
>> But if I unplug and plug the usb device:
>>
>> umass0: <vendor 0x3538 USB Mass Storage Device, class 0/0, rev
>> 2.00/1.00, addr 2> on uhub0
>> umass0: SCSI over Bulk-Only; quirks = 0x0000
>> umass0:0:0:-1: Attached to scbus0
>> da0 at umass-sim0 bus 0 target 0 lun 0
>> da0: <Generic USB Flash Disk 0.00> Removable Direct Access SCSI-2 device
>> da0: 1.000MB/s transfers
>> da0: 250MB (512000 512 byte sectors: 64H 32S/T 250C)
>>
>> Any ideas why this happens?
> 
> This is more guessing, but maybe the PLLB isn't really stable yet.
> We wait until the controller tells us when it is stable, but considered
> how many bugs this controller already has...
> Since the PLL has external components it may be specific to your
> board, but I assume a safety delay shouldn't hurt anyone.
> Or we should init the PLL already inside the bootcode.

I have added such initialization in at91rm9200_lowlevel.c but no difference:

        //configure PLLB to 48MhZ
        value = AT91C_BASE_CKGR->CKGR_PLLBR;
        value &= (AT91C_CKGR_DIVB | AT91C_CKGR_OUTB | AT91C_CKGR_MULB);
        value |= (5 << 0);              //divider
        value |= ((48-1) << 16);        //multiplier
        value |= AT91C_CKGR_OUTB_0;     //80MhZ - 160MhZ
        value |= AT91C_CKGR_USB_96M;    //used for usb
        if(AT91C_BASE_CKGR->CKGR_PLLBR != value) {
                AT91C_BASE_CKGR->CKGR_PLLBR = value;
                while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKB)) ;
        }


> On the other hand it already spends much time with the second port,
> so there must be enough delay when it comes to the second...
> 

Yes, this delay should be enough.


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