What value HZ?
Ian Lepore
ian at freebsd.org
Mon Sep 9 23:00:54 UTC 2019
On Mon, 2019-09-09 at 13:38 -0400, John Baldwin wrote:
> On 9/6/19 9:46 PM, Warner Losh wrote:
> > I'm top posting here, since this thread from a recent commit gives the
> > context
> >
> > I'm proposing basically the following patch:
> >
> > diff --git a/sys/kern/subr_param.c b/sys/kern/subr_param.c
> > index c0025c07eed..bb92afb6449 100644
> > --- a/sys/kern/subr_param.c
> > +++ b/sys/kern/subr_param.c
> > @@ -61,11 +61,7 @@ __FBSDID("$FreeBSD$");
> > */
> >
> > #ifndef HZ
> > -# if defined(__mips__) || defined(__arm__) || defined(__riscv)
> > -# define HZ 100
> > -# else
> > -# define HZ 1000
> > -# endif
> > +# define HZ 1000
> > # ifndef HZ_VM
> > # define HZ_VM 100
> > # endif
> >
> > Along with removing HZ from almost all the kernel config files in arm and
> > mips where it is already 1000. I'm agnostic about riscv, so would also be
> > open to just removing the first two clauses from the #if the diff shows me
> > removing.
>
> I think this sounds fine. On x86 we use hz=100 instead of 1000 in VMs via
> a runtime test.
Why? Was this done before or after the advent of event timers and the
tickless kernel? If done before, does it still make sense today?
> I suspect if anything we might want to take that same factor
> into account here. Thus, it makes sense for mips MALTA configs (most often
> run under qemu) to use 100, and/or to add a runtime test for qemu that switches
> from 1000 to 100. Similarly, for riscv we probably want to use 100 under
> qemu and spike, but 1000 on actual hardware via either kernel config options
> or runtime checks.
Why? I dunno about MALTA, but for riscv, when I look at the code I see
a timer.c that implements one-shot event timers (and actually doesn't
support periodic mode event timers at all). The timer.c code is
standard, not optional, so one-shot event timers are always available,
and the kernel should always run in tickless mode. That being the
case, what advantage is there to a lower HZ?
-- Ian
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