HEADSUP: HZ=1000 by default on i386

[Matthew Dillon]

:Identical to x86 for now.  Note that it would be really nice at some point to 
:drive hardclock and statclock via the local APIC timers for SMP on x86 and 
:amd64 so we can stop sending IPIs for each clock interrupt.  Alpha uses the 
:per-CPU timers this way already.
:
:-- 
:John Baldwin <jhb at FreeBSD.org>  <><  http://www.FreeBSD.org/~jhb/
    
    I'd recommend taking a look at the DragonFly SYSTIMER API which
    is basically exactly what you need here.  It has a simple API for
    registration and management of any number of one-shot and periodic
    timer events, with interrupt callback (the frame is available),
    per-cpu distribution, and so forth.  Right now we are driving the backend
    off a single timer but the API is designed with the future use of 
    per-cpu LAPIC timers in mind.  The SYSTIMER module will also aggregate
    events that happen to occur at the same time.  It's a very nice 
    abstraction and you could probably even port it over without also
    having to port our IPI messaging (though I would strongly recommend you
    do that too).  You could even adapt it to be based off a fixed HZ timer,
    it just means it will aggregate more events, though my original purpose
    for writing it was to make a fine-grained abstraction available to the
    system.

    All of our clock distribution is based on separately registered
    systimers now instead of being integrated into one big huge mess like
    it is in the BSD's (which in turn was inherited from CSRG and 
    hacked to pieces ever since).  Interfacing the systimer module to a
    machine-dependant clock interrupt ought to be fairly trivial.

    It's only 218 lines, *inclusive* of the DFly copyright.

    http://www.dragonflybsd.org/cgi-bin/cvsweb.cgi/src/sys/kern/kern_systimer.c
    http://www.dragonflybsd.org/cgi-bin/cvsweb.cgi/src/sys/sys/systimer.h

					-Matt
					Matthew Dillon 
					<dillon at backplane.com>