Ryzen Threadripper 1950X based on head -r340287: sysctl dev.cpu: 0-30 but no 31? (top shows all 0-31 "CPU"s) [subject corrected]

Mark Millard marklmi at yahoo.com
Sat Nov 17 20:56:55 UTC 2018


[Fixing dumb, confusing subject typo. No change below.]

On 2018-Nov-17, at 12:54, Mark Millard <marklmi at yahoo.com> wrote:


> For some reason there is no .dev.cpu.31 listed for the 1950X that
> I use. This is a native boot, not use under Hyper-V. For
> illustration I list:
> 
> # sysctl dev.cpu | grep "desc"
> dev.cpu.30.%desc: ACPI CPU
> dev.cpu.29.%desc: ACPI CPU
> dev.cpu.28.%desc: ACPI CPU
> dev.cpu.27.%desc: ACPI CPU
> dev.cpu.26.%desc: ACPI CPU
> dev.cpu.25.%desc: ACPI CPU
> dev.cpu.24.%desc: ACPI CPU
> dev.cpu.23.%desc: ACPI CPU
> dev.cpu.22.%desc: ACPI CPU
> dev.cpu.21.%desc: ACPI CPU
> dev.cpu.20.%desc: ACPI CPU
> dev.cpu.19.%desc: ACPI CPU
> dev.cpu.18.%desc: ACPI CPU
> dev.cpu.17.%desc: ACPI CPU
> dev.cpu.16.%desc: ACPI CPU
> dev.cpu.15.%desc: ACPI CPU
> dev.cpu.14.%desc: ACPI CPU
> dev.cpu.13.%desc: ACPI CPU
> dev.cpu.12.%desc: ACPI CPU
> dev.cpu.11.%desc: ACPI CPU
> dev.cpu.10.%desc: ACPI CPU
> dev.cpu.9.%desc: ACPI CPU
> dev.cpu.8.%desc: ACPI CPU
> dev.cpu.7.%desc: ACPI CPU
> dev.cpu.6.%desc: ACPI CPU
> dev.cpu.5.%desc: ACPI CPU
> dev.cpu.4.%desc: ACPI CPU
> dev.cpu.3.%desc: ACPI CPU
> dev.cpu.2.%desc: ACPI CPU
> dev.cpu.1.%desc: ACPI CPU
> dev.cpu.0.%desc: ACPI CPU
> 
> # sysctl dev.cpu.0
> dev.cpu.0.temperature: 57.1C
> dev.cpu.0.cx_method: C1/hlt C2/io
> dev.cpu.0.cx_usage_counters: 0 0
> dev.cpu.0.cx_usage: 0.00% 0.00% last 1000000us
> dev.cpu.0.cx_lowest: C1
> dev.cpu.0.cx_supported: C1/1/0 C2/2/100
> dev.cpu.0.freq_levels: 3400/-1 2800/-1 2200/-1
> dev.cpu.0.freq: 3400
> dev.cpu.0.%parent: acpi0
> dev.cpu.0.%pnpinfo: _HID=none _UID=0
> dev.cpu.0.%location: handle=\_PR_.C001
> dev.cpu.0.%driver: cpu
> dev.cpu.0.%desc: ACPI CPU
> 
> # sysctl dev.cpu.31
> sysctl: unknown oid 'dev.cpu.31'
> 
> By contrast I show from top's output all 0-31 CPU's:
> 
> CPU 0:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 1:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 2:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 3:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 4:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 5:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 6:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 7:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 8:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 9:   0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 10:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 11:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 12:  0.0% user,  0.0% nice,  0.0% system,  1.1% interrupt, 98.9% idle
> CPU 13:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 14:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 15:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 16:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 17:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 18:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 19:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 20:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 21:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 22:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 23:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 24:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 25:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 26:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 27:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 28:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 29:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 30:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle
> CPU 31:  0.0% user,  0.0% nice,  0.0% system,  0.0% interrupt,  100% idle


===
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)



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