AVX

Yamagi Burmeister lists at yamagi.org
Tue Jan 10 09:54:16 UTC 2012


On Mon, 9 Jan 2012 22:22:14 +0200
Kostik Belousov <kostikbel at gmail.com> wrote:

> > > > CPU: Intel(R) Core(TM)2 Duo CPU     T6670  @ 2.20GHz (2194.55-MHz
> > > > K8-class CPU) Origin = "GenuineIntel"  Id = 0x1067a  Family = 6  Model
> > > >   = 17  Stepping = 10
> > > > Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,
> > > >   MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
> > > > Features2=0x408e3bd<SSE3,DTES64,MON,DS_CPL,VMX,EST,TM2,SSSE3,CX16,xTPR,
> > > >   PDCM,SSE4.1,XSAVE>
> > > > AMD Features=0x20100800<SYSCALL,NX,LM> AMD Features2=0x1<LAHF> 
> > > Is this Features excerpt from the patched kernel, or from pristine svn
> > > sources ? If the later, please show me the Features from the patched
> > > kernel.
> > 
> > That was the output of the patched kernel.
> I see. The issue was that cpu_feature2, which is decoded to print the
> Features2 line, is retrieved much earlier then XCR0 is updated by
> fpu initialization code. I added a cludge to reload cpu_feature2 if
> XSAVE was indeed enabled. So now you should see OSXSAVE reported if
> XSAVE is indeed enabled.

Seems to be okay now:

Features2=0xc08e3bd<SSE3,DTES64,MON,DS_CPL,VMX,EST,TM2,
SSSE3,CX16,xTPR,PDCM,SSE4.1,XSAVE,OSXSAVE>

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