GENERIC doesn't boot AlphaServer 1000

[Marcel Moolenaar]

On Jul 4, 2005, at 12:01 PM, Wilko Bulte wrote:

> DS10 on booting the latest SNAP CD I produced:
>
> Timecounter "i8254" frequency 1193182 Hz quality 0
> Timecounter "alpha" frequency 616519676 Hz quality 800
> Timecounters tick every 0.976 msec
> Waiting 5 seconds for SCSI devices to settle
> md0: Preloaded image </boot/mfsroot> 4423680 bytes at 
> 0xfffffc00009fb128
> acd0: CDROM <CD-224E/9.9A> at ata0-master PIO4
> ad0: 39093MB <FUJITSU MPG3409AH E C3C9> at ata1-master UDMA33
> da0 at isp0 bus 0 target 0 lun 0
> da0: <COMPAQ AD009322B9 3A07> Fixed Direct Access SCSI-2 device
> da0: 40.000MB/s transfers (20.000MHz, offset 8, 16bit), Tagged Queueing
> Enabled
> da0: 8678MB (17773500 512 byte sectors: 255H 63S/T 1106C)
>
> fatal kernel trap:
>
>     trap entry     = 0x4 (unaligned access fault)
>     cpuid          = 0
>     faulting va    = 0xfffffc00010d7dc2
>     opcode         = 0x28
>     register       = 0x1
>     pc             = 0xfffffc00004c732c
>     ra             = 0xfffffc00004c7598
>     sp             = 0xfffffe001a35dbd0
>     curthread      = 0xfffffc003eac1500
>         pid = 2, comm = g_event
>
> [thread pid 2 tid 100003 ]
> Stopped at      is_pmbr+0x4c:   and     t0,#0xff,t0
> <t0=0xfffffc00010d7dbe>
> db>

The only alignment sensitive statement in is_pmbr() (in file geom_gpt.c)
is a 16-bit load from an address that is guaranteed to be aligned by
virtue of alignment guarantees of malloc(3) and kernel equivalents.
The faulting VA is in fact sufficiently aligned for a 16-bit load.

Could you post the assembly of is_pmbr(). It might be bad code.

-- 
  Marcel Moolenaar         USPA: A-39004          marcel at xcllnt.net