piix4 and C2: patch for BRLD_EN_BM/ACPI_BITREG_BUS_MASTER_RLD

[Rui Paulo]

On 2 Feb 2009, at 14:53, Andriy Gapon wrote:

>
> Another patch for acpi_cpu code related to PIIX4 chipset.
>
> We do not support C3 with this chipset and as such we never touch
> ACPI_BITREG_BUS_MASTER_RLD when running on it. It's also possible
> (probable) that we never reset ACPI_BITREG_BUS_MASTER_STATUS  
> (because of
> CPU_QUIRK_NO_BM_CTRL).
> So, if BIOS configures ACPI_BITREG_BUS_MASTER_RLD to 1 and
> ACPI_BITREG_BUS_MASTER_STATUS gets set to 1, we would get a situation
> where the system would always immediately break out of C2 state should
> we ever attempt to enter it.
>
> Actually, ACPI spec says that bus master activity need not break out  
> of
> C2 state (only interrupts must do that).
>
> Given all of the above, it seems to be safe and desired to reset
> ACPI_BITREG_BUS_MASTER_RLD to zero with this chipset.
>
> The patch is successfully tested on a real system that exhibited the
> above behavior (immediate backout from cx_lowest of C2 to C1).



Looks ok to me. I no longer have a PIIX4 system to test it, though.  
So, if no one raises any objection, I'll commit it to HEAD in a few  
days.

Andriy, if I forget, please ping me :-)

Thanks,
--
Rui Paulo


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