ACPI C3 patch for atheros

[Nate Lawson]

Sam Leffler wrote:
> Lots of old code here; at the time I cribbed the suspend-resume code I 
> don't believe the pci registers were saved for drivers.
> 
> Here's the code from which the change originated:
> 
>  >        /*
>  >>          * Suspend/Resume resets the PCI configuration space, so we 
> have to
>  >>          * re-disable the RETRY_TIMEOUT register (0x41) to keep
>  >>          * PCI Tx retries from interfering with C3 CPU state
>  >>          *
>  >>          * Code taken from ipw2100 driver - jg
>  >>          */
>  >>         pci_read_config_dword(pdev, 0x40, &val);
>  >>         if ((val & 0x0000ff00) != 0)
>  >>                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
> 
> 
> I was waiting for a reply from Warner about whether or not this belonged 
> in the driver or if the pci layer should be handling this.

If the comment is correct and the value is only lost due to 
suspend/resume, this should already be covered by us saving/restoring 
config registers although I believe we only save the normal registers 
(first 64 bytes).  Since RETRY_TIMEOUT is beyond that range, it's 
probably not currently saved.

In any case, I'd prefer we fix pci_cfg_save/restore() instead of doing 
this in the driver.  Overall, it would be useful to analyze and improve 
coverage of what values we save and restore from config space.  We 
definitely need to cover type 1 and 2 (bridge) devices as well.

-- 
Nate