git: dcbea9a2f465 - main - sifive_prci: Delay attachment until after clk_fixed

[Jessica Clarke]

The branch main has been updated by jrtc27:

URL: https://cgit.FreeBSD.org/src/commit/?id=dcbea9a2f465be1786db21523a7f55db3f7ab3dd

commit dcbea9a2f465be1786db21523a7f55db3f7ab3dd
Author:     Jessica Clarke <jrtc27 at FreeBSD.org>
AuthorDate: 2021-08-07 18:27:29 +0000
Commit:     Jessica Clarke <jrtc27 at FreeBSD.org>
CommitDate: 2021-08-07 18:27:29 +0000

    sifive_prci: Delay attachment until after clk_fixed
    
    This avoids noisy output from early attempts to attach before clk_fixed
    has attached to the parent clocks.
    
    Reviewed by:    kp, mhorne
    MFC after:      1 week
    Differential Revision:  https://reviews.freebsd.org/D31023
---
 sys/riscv/sifive/sifive_prci.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/sys/riscv/sifive/sifive_prci.c b/sys/riscv/sifive/sifive_prci.c
index 21b9cd568f32..36f2f6705f7e 100644
--- a/sys/riscv/sifive/sifive_prci.c
+++ b/sys/riscv/sifive/sifive_prci.c
@@ -638,5 +638,9 @@ static driver_t prci_driver = {
 
 static devclass_t prci_devclass;
 
+/*
+ * hfclk and rtcclk appear later in the device tree than prci, so we must
+ * attach late.
+ */
 EARLY_DRIVER_MODULE(sifive_prci, simplebus, prci_driver, prci_devclass, 0, 0,
-    BUS_PASS_BUS);
+    BUS_PASS_BUS + BUS_PASS_ORDER_LATE);