git: 30ae416898ef - main - Tegra210: Add lost-in-merge fixes: - misplaced '#ifdef notyet' in max77620.c - misnamed 'xusb_gate' clock in tegra210_clk_per.c

[Michal Meloun]

The branch main has been updated by mmel:

URL: https://cgit.FreeBSD.org/src/commit/?id=30ae416898efdae0599f1ddaffddc7233733aeb8

commit 30ae416898efdae0599f1ddaffddc7233733aeb8
Author:     Michal Meloun <mmel at FreeBSD.org>
AuthorDate: 2020-12-29 09:58:29 +0000
Commit:     Michal Meloun <mmel at FreeBSD.org>
CommitDate: 2020-12-30 09:53:41 +0000

    Tegra210: Add lost-in-merge fixes:
     - misplaced '#ifdef notyet' in max77620.c
     - misnamed 'xusb_gate' clock in tegra210_clk_per.c
---
 sys/arm64/nvidia/tegra210/max77620.c         | 2 +-
 sys/arm64/nvidia/tegra210/tegra210_clk_per.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/sys/arm64/nvidia/tegra210/max77620.c b/sys/arm64/nvidia/tegra210/max77620.c
index d46417ce0e28..a4fddb25e5a2 100644
--- a/sys/arm64/nvidia/tegra210/max77620.c
+++ b/sys/arm64/nvidia/tegra210/max77620.c
@@ -396,10 +396,10 @@ max77620_attach(device_t dev)
 	rv = 0;
 	LOCK_INIT(sc);
 
-#ifdef notyet /* Interrupt parent is not implemented */
 	rid = 0;
 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
 	    RF_ACTIVE);
+#ifdef notyet /* Interrupt parent is not implemented */
 	if (sc->irq_res == NULL) {
 		device_printf(dev, "Cannot allocate interrupt.\n");
 		rv = ENXIO;
diff --git a/sys/arm64/nvidia/tegra210/tegra210_clk_per.c b/sys/arm64/nvidia/tegra210/tegra210_clk_per.c
index 32ad855b5a55..b2f45062c02f 100644
--- a/sys/arm64/nvidia/tegra210/tegra210_clk_per.c
+++ b/sys/arm64/nvidia/tegra210/tegra210_clk_per.c
@@ -412,7 +412,7 @@ static struct pgate_def pgate_def[] = {
 	GATE(EMC_IOBIST, "emc_iobist", "clk_m", W(10)),
 	GATE(SATA_IOBIST, "sata_iobist", "clk_m", W(12)),
 	GATE(MIPI_IOBIST, "mipi_iobist", "clk_m", W(13)),
-	GATE(XUSB_GATE, "xusb", "clk_m", W(15)),
+	GATE(XUSB_GATE, "xusb_gate", "clk_m", W(15)),
 	GATE(CILAB, "cilab", "pc_cilab", W(16)),
 	GATE(CILCD, "cilcd", "pc_cilcd", W(17)),
 	GATE(CILE, "cilef", "pc_cilef", W(18)),