git: ba47eae9819a - stable/12 - amdtemp(4): Refactor shared temperature calculation logic
Alexander Motin
mav at FreeBSD.org
Thu Mar 4 15:14:06 UTC 2021
The branch stable/12 has been updated by mav:
URL: https://cgit.FreeBSD.org/src/commit/?id=ba47eae9819a758e693697a780741931dd6546d5
commit ba47eae9819a758e693697a780741931dd6546d5
Author: Conrad Meyer <cem at FreeBSD.org>
AuthorDate: 2020-01-28 01:38:51 +0000
Commit: Alexander Motin <mav at FreeBSD.org>
CommitDate: 2021-03-04 15:04:52 +0000
amdtemp(4): Refactor shared temperature calculation logic
No functional change intended.
(cherry picked from commit 02f700029357ddf31b538bbb5a23785d4ca4c7a8)
---
sys/dev/amdtemp/amdtemp.c | 45 ++++++++++++++++++++++++++++++---------------
1 file changed, 30 insertions(+), 15 deletions(-)
diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c
index d30fceba5894..023a88b46120 100644
--- a/sys/dev/amdtemp/amdtemp.c
+++ b/sys/dev/amdtemp/amdtemp.c
@@ -651,26 +651,46 @@ amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
}
static uint32_t
-amdtemp_decode_fam10h_to_16h(int32_t sc_offset, uint32_t val)
+amdtemp_decode_fam10h_to_17h(int32_t sc_offset, uint32_t val, bool minus49)
{
uint32_t temp;
/* Convert raw register subfield units (0.125C) to units of 0.1C. */
- temp = ((val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT) &
- AMDTEMP_REPTMP10H_CURTMP_MASK) * 5 / 4;
+ temp = (val & AMDTEMP_REPTMP10H_CURTMP_MASK) * 5 / 4;
+
+ if (minus49)
+ temp -= AMDTEMP_CURTMP_RANGE_ADJUST;
+
+ temp += AMDTEMP_ZERO_C_TO_K + sc_offset * 10;
+ return (temp);
+}
+
+static uint32_t
+amdtemp_decode_fam10h_to_16h(int32_t sc_offset, uint32_t val)
+{
+ bool minus49;
/*
* On Family 15h and higher, if CurTmpTjSel is 11b, the range is
* adjusted down by 49.0 degrees Celsius. (This adjustment is not
* documented in BKDGs prior to family 15h model 00h.)
*/
- if (CPUID_TO_FAMILY(cpu_id) >= 0x15 &&
+ minus49 = (CPUID_TO_FAMILY(cpu_id) >= 0x15 &&
((val >> AMDTEMP_REPTMP10H_TJSEL_SHIFT) &
- AMDTEMP_REPTMP10H_TJSEL_MASK) == 0x3)
- temp -= AMDTEMP_CURTMP_RANGE_ADJUST;
+ AMDTEMP_REPTMP10H_TJSEL_MASK) == 0x3);
- temp += AMDTEMP_ZERO_C_TO_K + sc_offset * 10;
- return (temp);
+ return (amdtemp_decode_fam10h_to_17h(sc_offset,
+ val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49));
+}
+
+static uint32_t
+amdtemp_decode_fam17h_tctl(int32_t sc_offset, uint32_t val)
+{
+ bool minus49;
+
+ minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0);
+ return (amdtemp_decode_fam10h_to_17h(sc_offset,
+ val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49));
}
static int32_t
@@ -699,16 +719,11 @@ static int32_t
amdtemp_gettemp17h(device_t dev, amdsensor_t sensor)
{
struct amdtemp_softc *sc = device_get_softc(dev);
- uint32_t temp, val;
+ uint32_t val;
int error;
error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &val);
KASSERT(error == 0, ("amdsmn_read"));
- temp = ((val >> 21) & 0x7ff) * 5 / 4;
- if ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0)
- temp -= AMDTEMP_CURTMP_RANGE_ADJUST;
- temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;
-
- return (temp);
+ return (amdtemp_decode_fam17h_tctl(sc->sc_offset, val));
}
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