git: 77a6e3930528 - main - devel/nspr: allow build on riscv64
Piotr Kubaj
pkubaj at FreeBSD.org
Wed Jun 9 08:43:59 UTC 2021
The branch main has been updated by pkubaj:
URL: https://cgit.FreeBSD.org/ports/commit/?id=77a6e3930528150f307396f2fa7a4a164d01e92c
commit 77a6e3930528150f307396f2fa7a4a164d01e92c
Author: Piotr Kubaj <pkubaj at FreeBSD.org>
AuthorDate: 2021-06-09 08:43:10 +0000
Commit: Piotr Kubaj <pkubaj at FreeBSD.org>
CommitDate: 2021-06-09 08:43:10 +0000
devel/nspr: allow build on riscv64
Sent by: linimon
Approved by: jbeich
PR: 251534
---
devel/nspr/files/patch-bug1711232 | 114 ++++++++++++++++++++++++++++++++++++++
1 file changed, 114 insertions(+)
diff --git a/devel/nspr/files/patch-bug1711232 b/devel/nspr/files/patch-bug1711232
new file mode 100644
index 000000000000..b5d6292bca4e
--- /dev/null
+++ b/devel/nspr/files/patch-bug1711232
@@ -0,0 +1,114 @@
+--- pr/include/md/_freebsd.h.orig 2021-05-26 16:06:44.000000000 +0000
++++ pr/include/md/_freebsd.h 2021-06-09 00:42:22.321211000 +0000
+@@ -37,6 +37,10 @@
+ #define _PR_SI_ARCHITECTURE "mips64"
+ #elif defined(__mips__)
+ #define _PR_SI_ARCHITECTURE "mips"
++#elif defined(__riscv) && (__riscv_xlen == 32)
++#define _PR_SI_ARCHITECTURE "riscv32"
++#elif defined(__riscv) && (__riscv_xlen == 64)
++#define _PR_SI_ARCHITECTURE "riscv64"
+ #else
+ #error "Unknown CPU architecture"
+ #endif
+--- pr/include/md/_freebsd.cfg.orig 2021-05-26 16:06:44.000000000 +0000
++++ pr/include/md/_freebsd.cfg 2021-06-09 00:43:52.361374000 +0000
+@@ -539,6 +544,98 @@
+
+ #define PR_BYTES_PER_WORD_LOG2 2
+ #define PR_BYTES_PER_DWORD_LOG2 3
++
++#elif defined(__riscv) && (__riscv_xlen == 32)
++
++#undef IS_BIG_ENDIAN
++#define IS_LITTLE_ENDIAN 1
++#undef IS_64
++
++#define PR_BYTES_PER_BYTE 1
++#define PR_BYTES_PER_SHORT 2
++#define PR_BYTES_PER_INT 4
++#define PR_BYTES_PER_INT64 8
++#define PR_BYTES_PER_LONG 4
++#define PR_BYTES_PER_FLOAT 4
++#define PR_BYTES_PER_DOUBLE 8
++#define PR_BYTES_PER_WORD 4
++#define PR_BYTES_PER_DWORD 8
++
++#define PR_BITS_PER_BYTE 8
++#define PR_BITS_PER_SHORT 16
++#define PR_BITS_PER_INT 32
++#define PR_BITS_PER_INT64 64
++#define PR_BITS_PER_LONG 32
++#define PR_BITS_PER_FLOAT 32
++#define PR_BITS_PER_DOUBLE 64
++#define PR_BITS_PER_WORD 32
++
++#define PR_BITS_PER_BYTE_LOG2 3
++#define PR_BITS_PER_SHORT_LOG2 4
++#define PR_BITS_PER_INT_LOG2 5
++#define PR_BITS_PER_INT64_LOG2 6
++#define PR_BITS_PER_LONG_LOG2 5
++#define PR_BITS_PER_FLOAT_LOG2 5
++#define PR_BITS_PER_DOUBLE_LOG2 6
++#define PR_BITS_PER_WORD_LOG2 5
++
++#define PR_ALIGN_OF_SHORT 2
++#define PR_ALIGN_OF_INT 4
++#define PR_ALIGN_OF_LONG 4
++#define PR_ALIGN_OF_INT64 8
++#define PR_ALIGN_OF_FLOAT 4
++#define PR_ALIGN_OF_DOUBLE 8
++#define PR_ALIGN_OF_POINTER 4
++#define PR_ALIGN_OF_WORD 4
++
++#define PR_BYTES_PER_WORD_LOG2 2
++#define PR_BYTES_PER_DWORD_LOG2 3
++
++#elif defined(__riscv) && (__riscv_xlen == 64)
++
++#undef IS_BIG_ENDIAN
++#define IS_LITTLE_ENDIAN 1
++#define IS_64
++
++#define PR_BYTES_PER_BYTE 1
++#define PR_BYTES_PER_SHORT 2
++#define PR_BYTES_PER_INT 4
++#define PR_BYTES_PER_INT64 8
++#define PR_BYTES_PER_LONG 8
++#define PR_BYTES_PER_FLOAT 4
++#define PR_BYTES_PER_DOUBLE 8
++#define PR_BYTES_PER_WORD 8
++#define PR_BYTES_PER_DWORD 8
++
++#define PR_BITS_PER_BYTE 8
++#define PR_BITS_PER_SHORT 16
++#define PR_BITS_PER_INT 32
++#define PR_BITS_PER_INT64 64
++#define PR_BITS_PER_LONG 64
++#define PR_BITS_PER_FLOAT 32
++#define PR_BITS_PER_DOUBLE 64
++#define PR_BITS_PER_WORD 64
++
++#define PR_BITS_PER_BYTE_LOG2 3
++#define PR_BITS_PER_SHORT_LOG2 4
++#define PR_BITS_PER_INT_LOG2 5
++#define PR_BITS_PER_INT64_LOG2 6
++#define PR_BITS_PER_LONG_LOG2 6
++#define PR_BITS_PER_FLOAT_LOG2 5
++#define PR_BITS_PER_DOUBLE_LOG2 6
++#define PR_BITS_PER_WORD_LOG2 6
++
++#define PR_ALIGN_OF_SHORT 2
++#define PR_ALIGN_OF_INT 4
++#define PR_ALIGN_OF_LONG 8
++#define PR_ALIGN_OF_INT64 8
++#define PR_ALIGN_OF_FLOAT 4
++#define PR_ALIGN_OF_DOUBLE 8
++#define PR_ALIGN_OF_POINTER 8
++#define PR_ALIGN_OF_WORD 8
++
++#define PR_BYTES_PER_WORD_LOG2 3
++#define PR_BYTES_PER_DWORD_LOG2 3
+
+ #else
+
More information about the dev-commits-ports-all
mailing list