cvs commit: src/sys/conf options.powerpc src/sys/dev/uart uart.h uart_bus_ocp.c uart_cpu_powerpc.c src/sys/kern subr_witness.c src/sys/powerpc/booke clock.c copyinout.c interrupt.c locore.S machdep.c pmap.c support.S swtch.S trap.c trap_subr.S ...

[Rafal Jaworowski]

raj         2008-03-03 17:17:01 UTC

  FreeBSD src repository

  Modified files:
    sys/conf             options.powerpc 
    sys/dev/uart         uart.h uart_cpu_powerpc.c 
    sys/kern             subr_witness.c 
    sys/powerpc/include  md_var.h mmuvar.h 
    sys/powerpc/powerpc  autoconf.c 
  Added files:
    sys/dev/uart         uart_bus_ocp.c 
    sys/powerpc/booke    clock.c copyinout.c interrupt.c locore.S 
                         machdep.c pmap.c support.S swtch.S trap.c 
                         trap_subr.S uio_machdep.c vm_machdep.c 
    sys/powerpc/include  ocpbus.h 
    sys/powerpc/mpc85xx  nexus.c ocpbus.c ocpbus.h opic.c 
                         pci_ocp.c 
  Log:
  Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.
  
  The PQ3 is a high performance integrated communications processing system
  based on the e500 core, which is an embedded RISC processor that implements
  the 32-bit Book E definition of the PowerPC architecture. For details refer
  to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E
  
  This port was tested and successfully run on the following members of the PQ3
  family: MPC8533, MPC8541, MPC8548, MPC8555.
  
  The following major integrated peripherals are supported:
  
    * On-chip peripherals bus
    * OpenPIC interrupt controller
    * UART
    * Ethernet (TSEC)
    * Host/PCI bridge
    * QUICC engine (SCC functionality)
  
  This commit brings the main functionality and will be followed by individual
  drivers that are logically separate from this base.
  
  Approved by:    cognet (mentor)
  Obtained from:  Juniper, Semihalf
  MFp4:           e500
  
  Revision  Changes    Path
  1.12      +2 -0      src/sys/conf/options.powerpc
  1.7       +1 -0      src/sys/dev/uart/uart.h
  1.1       +88 -0     src/sys/dev/uart/uart_bus_ocp.c (new)
  1.5       +26 -0     src/sys/dev/uart/uart_cpu_powerpc.c
  1.240     +3 -0      src/sys/kern/subr_witness.c
  1.1       +276 -0    src/sys/powerpc/booke/clock.c (new)
  1.1       +304 -0    src/sys/powerpc/booke/copyinout.c (new)
  1.1       +139 -0    src/sys/powerpc/booke/interrupt.c (new)
  1.1       +497 -0    src/sys/powerpc/booke/locore.S (new)
  1.1       +963 -0    src/sys/powerpc/booke/machdep.c (new)
  1.1       +3107 -0   src/sys/powerpc/booke/pmap.c (new)
  1.1       +106 -0    src/sys/powerpc/booke/support.S (new)
  1.1       +145 -0    src/sys/powerpc/booke/swtch.S (new)
  1.1       +679 -0    src/sys/powerpc/booke/trap.c (new)
  1.1       +842 -0    src/sys/powerpc/booke/trap_subr.S (new)
  1.1       +135 -0    src/sys/powerpc/booke/uio_machdep.c (new)
  1.1       +517 -0    src/sys/powerpc/booke/vm_machdep.c (new)
  1.31      +1 -0      src/sys/powerpc/include/md_var.h
  1.2       +1 -0      src/sys/powerpc/include/mmuvar.h
  1.1       +45 -0     src/sys/powerpc/include/ocpbus.h (new)
  1.1       +144 -0    src/sys/powerpc/mpc85xx/nexus.c (new)
  1.1       +585 -0    src/sys/powerpc/mpc85xx/ocpbus.c (new)
  1.1       +86 -0     src/sys/powerpc/mpc85xx/ocpbus.h (new)
  1.1       +99 -0     src/sys/powerpc/mpc85xx/opic.c (new)
  1.1       +781 -0    src/sys/powerpc/mpc85xx/pci_ocp.c (new)
  1.17      +4 -3      src/sys/powerpc/powerpc/autoconf.c