cvs commit: src/sys/amd64/amd64 identcpu.c src/sys/amd64/include specialreg.h src/sys/i386/i386 identcpu.c src/sys/i386/include specialreg.h

[Jung-uk Kim]

On Tuesday 20 March 2007 05:37 pm, Nate Lawson wrote:
> Jung-uk Kim wrote:
> > jkim        2007-03-20 20:22:46 UTC
> >
> >   FreeBSD src repository
> >
> >   Modified files:
> >     sys/amd64/amd64      identcpu.c
> >     sys/amd64/include    specialreg.h
> >     sys/i386/i386        identcpu.c
> >     sys/i386/include     specialreg.h
> >   Log:
> >   - Add macros for newly added CPUID bits in the corresponding
> > header files. - Use correct capticalization in xTPR as Intel uses
> > in their documents. - Use proper description instead of vendor
> > code name in comment.
> >
> >   Revision  Changes    Path
> >   1.152     +2 -2      src/sys/amd64/amd64/identcpu.c
> >   1.38      +2 -0      src/sys/amd64/include/specialreg.h
> >   1.174     +2 -2      src/sys/i386/i386/identcpu.c
> >   1.39      +2 -0      src/sys/i386/include/specialreg.h
> >
> >
> > Index: src/sys/amd64/amd64/identcpu.c
> > diff -u src/sys/amd64/amd64/identcpu.c:1.151
> > src/sys/amd64/amd64/identcpu.c:1.152 ---
> > src/sys/amd64/amd64/identcpu.c:1.151	Tue Mar 20 18:48:04 2007 +++
> > src/sys/amd64/amd64/identcpu.c	Tue Mar 20 20:22:45 2007 @@ -225,7
> > +225,7 @@
> >  				"\004MON"	/* MONITOR/MWAIT Instructions */
> >  				"\005DS_CPL"	/* CPL Qualified Debug Store */
> >  				"\006VMX"	/* Virtual Machine Extensions */
> > -				"\007SMX"	/* LaGrange Technology */
> > +				"\007SMX"	/* Safer Mode Extensions */
> >  				"\010EST"	/* Enhanced SpeedStep */
> >  				"\011TM2"	/* Thermal Monitor 2 */
> >  				"\012SSSE3"	/* SSSE3 */
>
> Thanks.  For the record, the previous name should have been
> "LaGrande Technology".

Yes, that's correct:

http://www.intel.com/technology/security/

> BTW, interested in adding two more features2 bits?  My core duo 2
> has bits 9 and 15 set for features2.
>
> CPU: Intel(R) Core(TM)2 CPU          6400  @ 2.13GHz (2129.19-MHz
> K8-class CPU)
>   Origin = "GenuineIntel"  Id = 0x6f2  Stepping = 2
> Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTR
>R,PGE,MCA,C
> MOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE>
> Features2=0xe3bd<SSE3,RSVD2,MON,DS_CPL,VMX,EST,TM2,<b9>,CX16,XTPR,<
>b15>> AMD Features=0x20100800<SYSCALL,NX,LM>
>   AMD Features2=0x1<LAHF>
>   Cores per package: 2

Bit 9 is SSSE3:

http://en.wikipedia.org/wiki/SSSE3

and it was added already:

http://docs.freebsd.org/cgi/mid.cgi?200701091923.l09JNMMH023658

I was looking for bit 15 for months but I could not find any 
reference.  The official documentation says it is reserved:

http://www.intel.com/design/processor/manuals/253666.pdf

I didn't add DCA and SMX because they were not listed there.

DCA only showed up here:

http://download.intel.com/design/Xeon/applnots/24161831.pdf

SMX is still draft spec.:

ftp://download.intel.com/technology/security/downloads/31516803.pdf

Probably bit 15 is some kind of secret weapon against AMD. ;-)

Jung-uk Kim