cvs commit: src/sys/amd64/amd64 cpu_switch.S machdep.c

[David O'Brien]

On Tue, Oct 18, 2005 at 09:44:02AM -0400, Andrew Gallatin wrote:
> It is a shame we can't find a way to use the TSC as a timecounter on
> SMP systems.  It seems that about 40% of the context switch time is
> spent just waiting for the PIO read of the ACPI-fast or i8254 to
> return.

Revision F Opterion's will have the RDTSCP (read serialized TSC pair)
instruction that helps some.  Slide 13 of
http://www.amd.com/us-en/assets/content_type/DownloadableAssets/dwamd_kernel_summit_08_RB.pdf 

Future Opteron's (or what ever AMD will call it then) will have a P-state
invarient TSC in 2007.
http://lwn.net/Articles/144098/

-- 
-- David  (obrien at FreeBSD.org)