cvs commit: src/sys/dev/vge if_vge.c

[David Xu]

Bill Paul wrote:

>>with this change, I got following error on my abit av8:
>>vge0: <VIA Networking Gigabit Ethernet> port 0xb800-0xb8ff mem 
>>0xf8122000-0xf81220ff irq 22 at device 14.0 on pci0
>>vge0: MII read timed out
>>vge0: failed to start MII autopoll
>>vge0: MII without any phy!
>>device_attach: vge0 attach returned 6
>>    
>>
>
>Fine, I took the reload step out. This should fix it. (If reading
>the RX filter registers instead of the EEPROM makes it mad, then
>I'll scream.)
> 
>  
>
With your lastest change, I still get same error result.

>>before this change, it can work for a while, then it will timeout :
>>
>>vge0: watchdog timeout
>>vge0: soft reset timed outvge0: EEPROM reload timed out
>>vge0: setting CAM filter failed
>>miibus1: unknown CICADA PHY model 0
>>miibus1: unknown CICADA PHY model 0
>>rl0: link state changed to DOWN
>>    
>>
>
>It must not be that important to you since you never bothered to mention
>this to anyone before.
>
>Given all the various things it's complaining about when it fails,
>it looks like the driver is no longer able to communicate with the device
>over the PCI bus. All register accesses are failing. This may not be a
>problem with the driver per-se, but with the PCI bridge. It might be
>the device has completely locked up, but if vge_reset() doesn't bring
>it back to life, then I don't know what else to do.
>
>  
>
Without recent change, I can kldunload and kldload it to bring it back 
to work.

>You can try changing SYS_RES_MEMORY to SYS_RES_IO to have the driver
>uses prorgrammed I/O register access instead of memory mapped access,
>but if that doesn'tmake it go away, I would start looking into PCI
>bridge bugs and workarounds.
>
>  
>
Will try.

>-Bill
> 
>
>
>  
>