cvs commit: src/sys/i386/i386 apic_vector.s initcpu.c io_apic.c local_apic.c locore.s trap.c src/sys/i386/include apicreg.h apicvar.h clock.h pcpu.h src/sys/i386/isa clock.c npx.c src/sys/i386/pci pci_cfgreg.c

[John Baldwin]

jhb         2003/11/03 13:53:38 PST

  FreeBSD src repository

  Modified files:
    sys/i386/i386        apic_vector.s initcpu.c locore.s trap.c 
    sys/i386/include     apicreg.h clock.h pcpu.h 
    sys/i386/isa         clock.c npx.c 
    sys/i386/pci         pci_cfgreg.c 
  Added files:
    sys/i386/i386        local_apic.c io_apic.c 
    sys/i386/include     apicvar.h 
  Log:
  New APIC support code:
  
  - The apic interrupt entry points have been rewritten so that each entry
    point can serve 32 different vectors.  When the entry is executed, it
    uses one of the 32-bit ISR registers to determine which vector in its
    assigned range was triggered.  Thus, the apic code can support 159
    different interrupt vectors with only 5 entry points.
  - We now always to disable the local APIC to work around an errata in
    certain PPros and then re-enable it again if we decide to use the APICs
    to route interrupts.
  - We no longer map IO APICs or local APICs using special page table
    entries.  Instead, we just use pmap_mapdev().  We also no longer
    export the virtual address of the local APIC as a global symbol to
    the rest of the system, but only in local_apic.c.  To aid this, the
    APIC ID of each CPU is exported as a per-CPU variable.
  - Interrupt sources are provided for each intpin on each IO APIC.
    Currently, each source is given a unique interrupt vector meaning that
    PCI interrupts are not shared on most machines with an I/O APIC.
    That mapping for interrupt sources to interrupt vectors is up to the
    APIC enumerator driver however.
  - We no longer probe to see if we need to use mixed mode to route IRQ 0,
    instead we always use mixed mode to route IRQ 0 for now.  This can be
    disabled via the 'NO_MIXED_MODE' kernel option.
  - The npx(4) driver now always probes to see if a built-in FPU is present
    since this test can now be performed with the new APIC code.  However,
    an SMP kernel will panic if there is more than one CPU and a built-in
    FPU is not found.
  - PCI interrupts are now properly routed when using APICs to route
    interrupts, so remove the hack to psuedo-route interrupts when the
    intpin register was read.
  - The apic.h header was moved to apicreg.h and a new apicvar.h header
    that declares the APIs used by the new APIC code was added.
  
  Revision  Changes    Path
  1.91      +90 -343   src/sys/i386/i386/apic_vector.s
  1.48      +0 -2      src/sys/i386/i386/initcpu.c
  1.1       +691 -0    src/sys/i386/i386/io_apic.c (new)
  1.1       +758 -0    src/sys/i386/i386/local_apic.c (new)
  1.181     +1 -2      src/sys/i386/i386/locore.s
  1.260     +3 -5      src/sys/i386/i386/trap.c
  1.25      +21 -7     src/sys/i386/include/apicreg.h
  1.1       +165 -0    src/sys/i386/include/apicvar.h (new)
  1.48      +0 -3      src/sys/i386/include/clock.h
  1.38      +2 -4      src/sys/i386/include/pcpu.h
  1.206     +17 -182   src/sys/i386/isa/clock.c
  1.144     +13 -37    src/sys/i386/isa/npx.c
  1.107     +2 -49     src/sys/i386/pci/pci_cfgreg.c