cvs commit: src/sys/ia64/include float.h

David Schultz das at FreeBSD.ORG
Wed Apr 2 16:13:12 PST 2003


Thus spake Marcel Moolenaar <marcel at xcllnt.net>:
> On Wed, Apr 02, 2003 at 09:19:21PM +1000, Bruce Evans wrote:
> > On Wed, 2 Apr 2003, Peter Jeremy wrote:
> > 
> > > On Wed, Apr 02, 2003 at 04:21:30PM +1000, Bruce Evans wrote:
> > > >On Wed, 2 Apr 2003, Peter Jeremy wrote:
> > > >
> > > >> On Tue, Apr 01, 2003 at 05:24:40PM +0200, Alexander Leidinger wrote:
> > > >> >We noticed that icc does use other values for LDBL_MIN than we do, and
> > > >> >instead of just thinking that Intel does it right I wanted to verify it.
> > > >
> > > >This might be caused by icc actually understanding the target's default
> > > >precision for long doubles (FreeBSD changes the hardware default of 64-bit
> > > >to 53-bit for technical reasons).
> > >
> > > Is this also true on ia64?
> > 
> > Probably not.  ia64's _fpmath.h says that there are 64 mantissa bits,
> > and we don't reduce the precision AFAIK.
> 
> Correct. Note that the 64-bit significand includes an explicit integer
> bit. The binary point is assumed to be between bits 62 and 63.

It seems like all architectures that use the 80-bit format have an
explicit MSB, including i386 and M68K.  I don't think the standard
says anything one way or the other about it, but it's a PITA when
it comes to writing MI library code.

> Note also that the 82-bit FP registers have a 17-bit exponent to aid
> in near-overflow and near-underflow computations in IEEE754 double-
> extended format. Of course an exception is still raised if the result
> does not fit the target if the target is in double-extended format.

Right.  I think the LDBL_{MIN,MAX}* constants need to refer to the
memory format, not the FPU-internal format.  If we *really* want
to be pedantic, we can clear the WRE bit in the FPU control
register and sacrifice the extra range in the interests of being
predictable.  That's similar to what we do with i386 now, where we
sacrifice precision so gcc bugs don't cause strange things to
happen in the lower echelons.  It's rather annoying.  We don't
change the default precision control setting on IA64, do we?


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