cvs commit: ports/cad Makefile ports/cad/freehdl Makefile distinfo
pkg-descr pkg-plist
Alejandro Pulver
alepulver at FreeBSD.org
Sun Nov 5 20:51:07 UTC 2006
alepulver 2006-11-05 20:51:06 UTC
FreeBSD ports repository
Modified files:
cad Makefile
Added files:
cad/freehdl Makefile distinfo pkg-descr pkg-plist
Log:
The goals of the FreeHDL project are to develop a VHDL simulator that has
a graphical waveform viewer and a source level debugger. It also aims at
VHDL-93 compliancy. The project is at a very early development stage.
WWW: http://www.freehdl.seul.org/
PR: ports/104634
Submitted by: lon_kamikaze at gmx.de
Revision Changes Path
1.93 +1 -0 ports/cad/Makefile
1.1 +53 -0 ports/cad/freehdl/Makefile (new)
1.1 +3 -0 ports/cad/freehdl/distinfo (new)
1.1 +5 -0 ports/cad/freehdl/pkg-descr (new)
1.1 +110 -0 ports/cad/freehdl/pkg-plist (new)
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