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Sat, 12 Oct 2024 16:12:37 +1000 (AEST) Received: from [192.168.1.101] (otn-120-29-24-249.broadband.onthenet.net [120.29.24.249]) by iredmail.onthenet.com.au (Postfix) with ESMTPSA id BF7772127CB9; Sat, 12 Oct 2024 16:12:37 +1000 (AEST) Message-ID: Date: Sat, 12 Oct 2024 16:12:37 +1000 List-Id: Discussion List-Archive: https://lists.freebsd.org/archives/freebsd-virtualization List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: freebsd-virtualization@freebsd.org Sender: owner-freebsd-virtualization@FreeBSD.org MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Running Mezzano in bhyve To: Vasily Postnicov Cc: freebsd-virtualization@freebsd.org References: <17f4077d-647d-4848-9d6f-97f9886ef636@freebsd.org> <8b249b64-d041-4f12-b6cb-fdb528837f22@freebsd.org> Content-Language: en-US From: Peter Grehan In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-CMAE-Score: 0 X-CMAE-Analysis: v=2.4 cv=Fu4D/Xrq c=1 sm=1 tr=0 ts=670a1356 a=A6CF0fG5TOl4vs6YHvqXgw==:117 a=0UtLtLgMz4NvdyIsuxvgLw==:17 a=IkcTkHD0fZMA:10 a=DAUX931o1VcA:10 a=bi0XHdcepdgA:10 a=BYglAFDJemt_E9MsyRoA:9 a=QEXdDO2ut3YA:10 X-Spamd-Result: default: False [-3.29 / 15.00]; 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ASN(0.00)[asn:9313, ipnet:203.13.68.0/24, country:AU]; RCVD_VIA_SMTP_AUTH(0.00)[]; TO_DN_SOME(0.00)[] X-Rspamd-Queue-Id: 4XQY7f17Y0z4FLp X-Spamd-Bar: --- > I suspect PCI interrupts are not functioning correctly. >=20 > Look at this code: > =C2=A0 =C2=A0 ;; Attach interrupt handler. > =C2=A0 =C2=A0 (sup:debug-print-line "Handler: " (ahci-irq-handler ahci= )) > =C2=A0 =C2=A0 (sup:irq-attach (sup:platform-irq (pci:pci-intr-line loc= ation)) > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = (ahci-irq-handler-function ahci) > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = ahci) >=20 > and this >=20 > (defun pci-intr-line (device) > =C2=A0 (pci-config/8 device +pci-config-intr-line+)) ;; comment by me:= the=20 > constant is #x3c >=20 > I found that "PCI 0x3c" means PCI interrupt pin. AFAIK, interrupt pins=20 > are not supported by bhyve, is that=C2=A0correct? If it's true, I need = either=20 > to teach bhyve how to deal with legacy interrupts or to teach Mezzano t= o=20 > understand MSI. What would be easier in your=C2=A0opinion? Legacy interrupts should work fine in bhyve for emulated devices. I'd=20 suspect this would be much easier to debug/enhance as opposed to adding=20 MSI (and likely MSI-x). later, Peter.