Re: 64 core RISCV board program from riscv.org

On 11 Jun 2023, at 00:34, S JG <sean.jensengrey@gmail.com> wrote:
> 
> The RISC-V Intl has a program to get dev boards for OSS developers. 
> 
> https://riscv.org/risc-v-developer-boards/details/
> 
> And they are offering up a "Pioneer Box from Milk" which contains a 64 core RISCV CPU from Sophon. These are Thead C920 cores.
> 
> https://milkv.io/pioneer
> 
> https://en.sophgo.com/product/introduce/sg2042.html 
> 
> Looks like an ideal dev/test/build platform to support FreeBSD.
> 
> Apparently the C920 is nearly identical to the C910 (which is Open Source)
> 
> https://www.t-head.cn/product/c910?lang=en
> 
> https://github.com/T-head-Semi/openc910
> 
> https://img.102.alibaba.com/1627958419409/49652c9412c41cb6f39b36fed1244e6e.pdf
> 
> https://www.reddit.com/r/RISCV/comments/10pvd96/64cores_c920_processor/

They also have a non-standard vendor extension for memory attributes
and cache maintenance operations (conflicting with the standard ones)
that you have to use in order to have working device drivers, which
would mean writing and maintaining vendor-specific pmap and busdma
changes. Up until now T-Head’s cores haven’t been in anything
particularly high-powered and so we’ve just ignored the problem, but
this may require a rethink. It is a real shame they couldn’t have made
the C920 follow the specs (like at least one of their more recent IP
offerings does).

Jess