Re: Question about AMD64 ABI

On Mon, Nov 14, 2022 at 9:19 PM Daniel Cervus <DanieltheDeer@outlook.com>
wrote:

>
> Again, most compilers are smart enough to perhaps `and reg, 0x0FFFF` or
> simply ignore the high bits on its own, but ultimately you do feed it the
> entire register in which if the callee expects to operate on 16-bits or
> smaller it better do so.
>
>
> So I had better zero-extend it to 32 bit, right? Why not 64, because it’s
> already safe enough?
>
> Or just because the higher 32 bits can be automatically cleared?
>

Operations on 32 bit operands clear (sets to 0) bits 32 through 63
automatically of a given register.

and eax, 0xFFFF

This clears bits 16 through 63 because the operand is a 32 bit one.  It's
implicit due to this convention.
The following however, doesn't touch any of the bits higher than 16.

and ax, 0xFFFF

This is because your operand isn't 32 bits.
Both are in essence working the same rax/eax/ax register, but rules of what
zero's when play roles here.

The easiest way to remember this is when you use a 32-bit register as your
operand, bits 32 through 64 will almost always get reset to zero.

I honestly suck at explaining things clearly.  Perhaps the manual itself
can explain it better than I.  Section 3.4 is where Intel describes the
behavior I'm trying to describe.
https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf

~Paul
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