Re: After 13.1 install, "panic: AP #1 (PHY #1) failed!" with SuperMicro X10SRL-F motherboard

(Please email me too when you reply.)


On Fri, Dec 9, 2022 at 9:35 AM Anubhav/FreeBSD wrote:

> The computer server with ...
>
> SuperMicro X10SRL-F motherboard (LGA 2011-V3, C612 chipset),
> Intel Xeon E5-1620 V3 CPU
>
> ... was working just fine with FreeBSD 12.x & 13.0. 13.0 was
> installed from scratch with ZFS on root.
>
> Two days ago I updated the OS to 13.1-p5 in a new boot environment
> ("freebsd-update -r 13.1-RELEASE upgrade"; "freebsd-update install";
> reboot; "freebsd-update install"). I did so over ssh.
>
> ...

> After reboot of 13.1-p5, a "panic" happens all the 3-4 times I tried ...
>
> (transcribed from the photo of the screen after booting in verbose mode)
> SMP: Added CPU 1 (AP)
> MADT: Found CPU APIC ID 3 ACPI ID 3: enabled
> SMP: Added CPU 3 (AP)
> MADT: Found CPU APIC ID 5 ACPI ID 5: enabled
> SMP: Added CPU 5 (AP)
> MADT: Found CPU APIC ID 7 ACPI ID 7: enabled
> SMP: Added CPU 7 (AP)
> Event timer "LAPIC" quality 600
> LAPIC: ipi_wait() us multiplier 64 (r 5400080 tsc 3500095930)
> ACPI APIC Table: <SUPERM SMCI--MB>
> Package ID shift: 4
> L3 cache shift: 4
> L2 cache shift: 1
> L1 cache shift: 1
> Core ID shift: 1
> AP boot address: 0x98000
> panic: AP #1 (PHY #1) failed!
> cpuid = 0
> time = 1
> KDB: stack backtrace
> #0 0xffffffff80c694a5 at kdb_backtrace+0x65
> #1 0xffffffff80c1bb5f at vpanic+0x17f
> #2 0xffffffff80c1b983 at panic+0x43
> #3 0xffffffff81093633 at native_start_all_aps+0x633
> #4 0xffffffff81092ce1 at cpu_mp_start+0x1a1
> #5 0xffffffff80c7c32a at mp_start+0x9a
> #6 0xffffffff80ba970f at mi_startup+0xdf
> #7 0xffffffff80385022 at btext+0x22
> Uptime: 1s
>
> ...

I wonder if "3.0a" c 2018 update could be helpful ...


https://www.supermicro.com/en/support/resources/downloadcenter/firmware/MBD-X10SRL-F/BIOS

https://www.supermicro.com/Bios/softfiles/14139/X10SRL-F_BIOS_3.4_release_notes.pdf
  (The direct PDF URL does not work; need to go to the "Download" page
   first.)

"
  1. Updated CPU microcode to address ‘Spectre’ variant 2 (CVE
      2017-5715) security issue.
  2. Updated SATA RAID OPROM/EFI driver to RSTe PreOS v4.7.0.1014.
  3. Updated Intel Server Platform Services 3.1.3.50 for Grantley
      Refresh Platforms.
  4. Removed support for using Ctrl+home to trigger recovery.
  5. Changed Memory correctable threshold to 100 and enabled Cloaking
      for Broadwell CPU E5-26xx SKU.
  6. Changed BIOS revision to 3.0a.
  7. Updated Broadwell-EP RC 4.3.0 PLR10 release.
  8. Removed the "P1" string when Memory error occurs on UP server.
  9. Corrected POST diagnostic signOn string.
  10. Patched Micron Z11C DIMM to improve stability.
  11. Changed tCCD_L Relaxation default to 1 and changed string from
      Enabled to Auto.
  12. Appended VPD - VB tag in VPD-W Tag(0x91) area.
  13. Updated new MRC error log definition.
  14. Added Intel SPI vulnerability patch for Grantley.
  15. Added "SMBIOS Preservation" Enabled/Disabled item for flash
      recovery.
  16. Enhanced SMC Recovery Flash Boot Block feature.
  17. Displayed setup item "ACS Control" to Enable/Disable PCIe Access
      Control Services Extended Capability.
  18. Added BBS reset function to SmcOobLoadBiosDefault().
  19. Added SumBbsSupportFlag into DAT file.
  20. Implemented SMC Recovery Flash Boot Block feature.
  21. Fixed issue of SUM TC306 and TC317 failing in certain
      configuration cases.
  22. Fixed problem of system hanging after Watch Dog function is
      enabled and then BIOS is updated.
  23. Fixed incorrect memory error location on UP server.
  24. Fixed problem of system hanging on POST code 0xB2.
  25. Fixed problem of system resetting or hanging after Watch Dog
      function is enabled and then BIOS is updated.
  26. Fixed inability to get correct Memory CECC DIMM location via SD5.
  27. Fixed problem of incorrect PCI slot number showing on
      Legacy/UEFI mode.
"

... Also, how does one go about flashing the BIOS: boot with copy of
the files on a USB flash disk?


- Anubhav