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charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Jul 25, 2024 at 3:52=E2=80=AFPM Jaap Akkerhuis w= rote: > > > On 25 Jul 2024, at 05:21, Junho Choi wrote: > > I got a build failure log of a recently updated port (net/quiche-0.22.0). > > Looks like this is a dependency (ring) issue and already reported > https://github.com/briansmith/ring/issues/1999 > > > Seems a known problem. ring-0.17.8/src/cpu/intel.rs says: > > ... > ... > #[cfg(any(target_arch =3D "x86", target_arch =3D "x86_64"))] > mod abi_assumptions { > // TOOD: Support targets that do not have SSE and SSE2 > enabled, such as > // x86_64-unknown-linux-none. See > // > https://github.com/briansmith/ring/issues/1793#issuecomment-1793243725, > // https://github.com/briansmith/ring/issues/1832, > // https://github.com/briansmith/ring/issues/1833. > const _ASSUMES_SSE2: () =3D > assert!(cfg!(target_feature =3D "sse") && > cfg!(target_feature =3D "sse2")); > ... > ... > > jaap > > Right. Author's comment here https://github.com/briansmith/ring/issues/1999#issuecomment-2151011318 Looks like some amount of work is required to support i386 CPUs with non-SSE. --=20 Junho Choi | https://saturnsoft.net --000000000000543736061e0d7de1 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Seems a known problem.=C2= =A0ring-0.17.8/src/cpu/intel.= rs says:

=C2=A0 =C2=A0 =C2=A0 =C2=A0...
=C2=A0 =C2=A0 =C2=A0 =C2=A0 ...
=C2=A0 =C2=A0 =C2=A0 =C2= =A0 #[cfg(any(target_arch =3D "x86", target_arch =3D "x86_64= "))]
=C2=A0 =C2=A0 =C2=A0 =C2=A0 mod abi_assumptions {
=
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 // TOOD: Support targets tha= t do not have SSE and SSE2 enabled, such as
=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 // x86_64-unknown-linux-none. See
=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 // https://github= .com/briansmith/ring/issues/1793#issuecomment-1793243725,
=C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 // https://github.com/briansmith/r= ing/issues/1832,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 //= https://github.com/briansmith/ring/issues/1833.
=C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 const _ASSUMES_SSE2: () =3D
=C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 assert!(cfg!(target_fe= ature =3D "sse") && cfg!(target_feature =3D "sse2&qu= ot;));
=C2=A0 =C2=A0 =C2=A0 =C2=A0 ...
=C2=A0 =C2=A0 = =C2=A0 =C2=A0 ...

=C2=A0 jaap


Right. Author's comment here https://github.com/briansmith/ring/issues/1999#issuecomment-215101131= 8
Looks like some amount of work is required to support i386 = CPUs with non-SSE.

-- <= /span>
=
Junho Choi <junho dot choi at gmail.com> | https://saturnsoft.net
<= /div> --000000000000543736061e0d7de1--