[package - main-amd64-default][cad/yosys-systemverilog] Failed for yosys-systemverilog-2023.06.14 in build
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Date: Mon, 31 Jul 2023 09:17:05 UTC
You are receiving this mail as a port that you maintain
is failing to build on the FreeBSD package build server.
Please investigate the failure and submit a PR to fix
build.
Maintainer: yuri@FreeBSD.org
Log URL: https://pkg-status.freebsd.org/beefy18/data/main-amd64-default/p04fdfe963096_sc620788150/logs/yosys-systemverilog-2023.06.14.log
Build URL: https://pkg-status.freebsd.org/beefy18/build.html?mastername=main-amd64-default&build=p04fdfe963096_sc620788150
Log:
=>> Building cad/yosys-systemverilog
build started at Mon Jul 31 09:14:15 UTC 2023
port directory: /usr/ports/cad/yosys-systemverilog
package name: yosys-systemverilog-2023.06.14
building for: FreeBSD main-amd64-default-job-12 14.0-CURRENT FreeBSD 14.0-CURRENT 1400093 amd64
maintained by: yuri@FreeBSD.org
Makefile ident:
Poudriere version: 3.2.8-23-ga7f8d188
Host OSVERSION: 1400089
Jail OSVERSION: 1400093
Job Id: 12
!!! Jail is newer than host. (Jail: 1400093, Host: 1400089) !!!
!!! This is not supported. !!!
!!! Host kernel must be same or newer than jail. !!!
!!! Expect build failures. !!!
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UNAME_v=FreeBSD 14.0-CURRENT 1400093
UNAME_r=14.0-CURRENT
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HOME=/root
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USER=root
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MASTERMNT=/usr/local/poudriere/data/.m/main-amd64-default/ref
POUDRIERE_BUILD_TYPE=bulk
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SAVED_TERM=
PWD=/usr/local/poudriere/data/.m/main-amd64-default/ref/.p/pool
P_PORTS_FEATURES=FLAVORS SELECTED_OPTIONS
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OLDPWD=/usr/local/poudriere/data/.m/main-amd64-default/ref/.p
SCRIPTPATH=/usr/local/share/poudriere/bulk.sh
POUDRIEREPATH=/usr/local/bin/poudriere
---End Environment---
---Begin Poudriere Port Flags/Env---
PORT_FLAGS=
PKGENV=
FLAVOR=
DEPENDS_ARGS=
MAKE_ARGS=
---End Poudriere Port Flags/Env---
---Begin OPTIONS List---
===> The following configuration options are available for yosys-systemverilog-2023.06.14:
TCMALLOC=on: Use the tcmalloc memory allocation library
===> Use 'make config' to modify these settings
---End OPTIONS List---
--MAINTAINER--
yuri@FreeBSD.org
--End MAINTAINER--
--CONFIGURE_ARGS--
--End CONFIGURE_ARGS--
--CONFIGURE_ENV--
MAKE=gmake PKG_CONFIG=pkgconf PYTHON="/usr/local/bin/python3.9" XDG_DATA_HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work XDG_CONFIG_HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work XDG_CACHE_HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work/.cache HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work TMPDIR="/tmp" PATH=/wrkdirs/usr/ports/cad/yosys-systemverilog/work/.bin:/sbin:/bin:/usr/sbin:/usr/bin:/usr/local/sbin:/usr/local/bin:/root/bin PKG_CONFIG_LIBDIR=/wrkdirs/usr/ports/cad/yosys-systemverilog/work/.pkgconfig:/usr/local/libdata/pkgconfig:/usr/local/share/pkgconfig:/usr/libdata/pkgconfig SHELL=/bin/sh CONFIG_SHELL=/bin/sh
--End CONFIGURE_ENV--
--MAKE_ENV--
DESTDIR= HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14 XDG_DATA_HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work XDG_CONFIG_HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work XDG_CACHE_HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work/.cache HOME=/wrkdirs/usr/ports/cad/yosys-systemverilog/work TMPDIR="/tmp" PATH=/wrkdirs/usr/ports/cad/yosys-systemverilog/work/.bin:/sbin:/bin:/usr/sbin:/usr/bin:/usr/local/sbin:/usr/local/bin:/root/bin PKG_CONFIG_LIBDIR=/wrkdirs/usr/ports/cad/yosys-systemverilog/work/.pkgconfig:/usr/local/libdata/pkgconfig:/usr/local/share/pkgconfig:/usr/libdata/pkgconfig MK_DEBUG_FILES=no MK_KERNEL_SYMBOLS=no SHELL=/bin/sh NO_LINT=YES PREFIX=/usr/local LOCALBASE=/usr/local CC="cc" CFLAGS="-O2 -pipe -fstack-protector-strong -fno-strict-aliasing " CPP="cpp" CPPFLAGS="-I/usr/local/include" LDFLAGS=" `pkg-config --libs libtcmalloc` -L/usr/local/lib -fstack-protector-strong " LIBS="" CXX="c++" CXXFLA
GS="-O2 -pipe -fstack-protector-strong -fno-strict-aliasing " MANPREFIX="/usr/local" BSD_INSTALL_PROGRAM="install -s -m 555" BSD_INSTALL_LIB="install -s -m 0644" BSD_INSTALL_SCRIPT="install -m 555" BSD_INSTALL_DATA="install -m 0644" BSD_INSTALL_MAN="install -m 444"
--End MAKE_ENV--
--PLIST_SUB--
PYTHON_INCLUDEDIR=include/python3.9 PYTHON_LIBDIR=lib/python3.9 PYTHON_PLATFORM=freebsd14 PYTHON_SITELIBDIR=lib/python3.9/site-packages PYTHON_SUFFIX=39 PYTHON_EXT_SUFFIX=.cpython-39 PYTHON_VER=3.9 PYTHON_VERSION=python3.9 PYTHON2="@comment " PYTHON3="" OSREL=14.0 PREFIX=%D LOCALBASE=/usr/local RESETPREFIX=/usr/local LIB32DIR=lib DOCSDIR="share/doc/yosys-systemverilog" EXAMPLESDIR="share/examples/yosys-systemverilog" DATADIR="share/yosys-systemverilog" WWWDIR="www/yosys-systemverilog" ETCDIR="etc/yosys-systemverilog"
--End PLIST_SUB--
--SUB_LIST--
PYTHON_INCLUDEDIR=/usr/local/include/python3.9 PYTHON_LIBDIR=/usr/local/lib/python3.9 PYTHON_PLATFORM=freebsd14 PYTHON_SITELIBDIR=/usr/local/lib/python3.9/site-packages PYTHON_SUFFIX=39 PYTHON_EXT_SUFFIX=.cpython-39 PYTHON_VER=3.9 PYTHON_VERSION=python3.9 PYTHON2="@comment " PYTHON3="" PREFIX=/usr/local LOCALBASE=/usr/local DATADIR=/usr/local/share/yosys-systemverilog DOCSDIR=/usr/local/share/doc/yosys-systemverilog EXAMPLESDIR=/usr/local/share/examples/yosys-systemverilog WWWDIR=/usr/local/www/yosys-systemverilog ETCDIR=/usr/local/etc/yosys-systemverilog
--End SUB_LIST--
---Begin make.conf---
USE_PACKAGE_DEPENDS=yes
BATCH=yes
WRKDIRPREFIX=/wrkdirs
PORTSDIR=/usr/ports
PACKAGES=/packages
DISTDIR=/distfiles
PACKAGE_BUILDING=yes
PACKAGE_BUILDING_FLAVORS=yes
#### /usr/local/etc/poudriere.d/make.conf ####
# XXX: We really need this but cannot use it while 'make checksum' does not
# try the next mirror on checksum failure. It currently retries the same
# failed mirror and then fails rather then trying another. It *does*
# try the next if the size is mismatched though.
#MASTER_SITE_FREEBSD=yes
# Build ALLOW_MAKE_JOBS_PACKAGES with 2 jobs
MAKE_JOBS_NUMBER=2
#### /usr/ports/Mk/Scripts/ports_env.sh ####
_CCVERSION_921dbbb2=FreeBSD clang version 16.0.6 (https://github.com/llvm/llvm-project.git llvmorg-16.0.6-0-g7cbf1a259152) Target: x86_64-unknown-freebsd14.0 Thread model: posix InstalledDir: /usr/bin
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CC_OUTPUT_921dbbb2_a15f3fcf=yes
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ARCH=amd64
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OSREL=14.0
OSVERSION=1400093
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HAVE_COMPAT_IA32_KERN=YES
CONFIGURE_MAX_CMD_LEN=524288
HAVE_PORTS_ENV=1
#### Misc Poudriere ####
GID=0
UID=0
---End make.conf---
--Resource limits--
cpu time (seconds, -t) unlimited
file size (512-blocks, -f) unlimited
data seg size (kbytes, -d) 33554432
stack size (kbytes, -s) 524288
core file size (512-blocks, -c) unlimited
max memory size (kbytes, -m) unlimited
locked memory (kbytes, -l) unlimited
max user processes (-u) 89999
open files (-n) 1024
virtual mem size (kbytes, -v) unlimited
swap limit (kbytes, -w) unlimited
socket buffer size (bytes, -b) unlimited
pseudo-terminals (-p) unlimited
kqueues (-k) unlimited
umtx shared locks (-o) unlimited
--End resource limits--
=======================<phase: check-sanity >============================
===> License APACHE20 accepted by the user
===========================================================================
=======================<phase: pkg-depends >============================
===> yosys-systemverilog-2023.06.14 depends on file: /usr/local/sbin/pkg - not found
===> Installing existing package /packages/All/pkg-1.20.4.pkg
[main-amd64-default-job-12] Installing pkg-1.20.4...
[main-amd64-default-job-12] Extracting pkg-1.20.4: .......... done
===> yosys-systemverilog-2023.06.14 depends on file: /usr/local/sbin/pkg - found
===> Returning to build of yosys-systemverilog-2023.06.14
===========================================================================
=======================<phase: fetch-depends >============================
===========================================================================
=======================<phase: fetch >============================
===> License APACHE20 accepted by the user
===> Fetching all distfiles required by yosys-systemverilog-2023.06.14 for building
===========================================================================
=======================<phase: checksum >============================
===> License APACHE20 accepted by the user
===> Fetching all distfiles required by yosys-systemverilog-2023.06.14 for building
=> SHA256 Checksum OK for cabal/alex-3.3.0.0/alex-3.3.0.0.tar.gz.
=> SHA256 Checksum OK for cabal/cmdargs-0.10.22/cmdargs-0.10.22.tar.gz.
=> SHA256 Checksum OK for cabal/githash-0.1.6.3/githash-0.1.6.3.tar.gz.
=> SHA256 Checksum OK for cabal/happy-1.20.1.1/happy-1.20.1.1.tar.gz.
=> SHA256 Checksum OK for cabal/hashable-1.4.2.0/hashable-1.4.2.0.tar.gz.
=> SHA256 Checksum OK for cabal/hashable-1.4.2.0/revision/1.cabal.
=> SHA256 Checksum OK for cabal/primitive-0.8.0.0/primitive-0.8.0.0.tar.gz.
=> SHA256 Checksum OK for cabal/th-compat-0.1.4/th-compat-0.1.4.tar.gz.
=> SHA256 Checksum OK for cabal/th-compat-0.1.4/revision/2.cabal.
=> SHA256 Checksum OK for cabal/vector-0.13.0.0/vector-0.13.0.0.tar.gz.
=> SHA256 Checksum OK for cabal/vector-0.13.0.0/revision/3.cabal.
=> SHA256 Checksum OK for cabal/vector-stream-0.1.0.0/vector-stream-0.1.0.0.tar.gz.
=> SHA256 Checksum OK for cabal/vector-stream-0.1.0.0/revision/2.cabal.
=> SHA256 Checksum OK for cabal/antmicro-yosys-systemverilog-2023-06-14-49069fb-2023-06-14_GH0.tar.gz.
=> SHA256 Checksum OK for cabal/chipsalliance-yosys-f4pga-plugins-56f957c_GH0.tar.gz.
=> SHA256 Checksum OK for cabal/zachjs-sv2v-6c4ee8f_GH0.tar.gz.
=> SHA256 Checksum OK for cabal/YosysHQ-yosys-c5e4eec_GH0.tar.gz.
===========================================================================
<snip>
--
This OpenJDK implementation requires fdescfs(5) mounted on /dev/fd and
procfs(5) mounted on /proc.
If you have not done it yet, please do the following:
mount -t fdescfs fdesc /dev/fd
mount -t procfs proc /proc
To make it permanent, you need the following lines in /etc/fstab:
fdesc /dev/fd fdescfs rw 0 0
proc /proc procfs rw 0 0
===> yosys-systemverilog-2023.06.14 depends on shared library: libsurelog.so - found (/usr/local/lib/surelog/libsurelog.so)
===> Returning to build of yosys-systemverilog-2023.06.14
===> yosys-systemverilog-2023.06.14 depends on shared library: libuhdm.so - found (/usr/local/lib/uhdm/libuhdm.so)
===> yosys-systemverilog-2023.06.14 depends on shared library: libtcmalloc.so - found (/usr/local/lib/libtcmalloc.so)
===> yosys-systemverilog-2023.06.14 depends on shared library: libgmp.so - found (/usr/local/lib/libgmp.so)
===> yosys-systemverilog-2023.06.14 depends on shared library: libffi.so - found (/usr/local/lib/libffi.so)
===> yosys-systemverilog-2023.06.14 depends on shared library: libreadline.so.8 - found (/usr/local/lib/libreadline.so.8)
===> yosys-systemverilog-2023.06.14 depends on shared library: libtcl86.so - found (/usr/local/lib/libtcl86.so)
===========================================================================
=======================<phase: configure >============================
===> Configuring for yosys-systemverilog-2023.06.14
===========================================================================
=======================<phase: build >============================
===> Building for yosys-systemverilog-2023.06.14
echo "==> Building the C part (yosys-f4pga-plugins)"
==> Building the C part (yosys-f4pga-plugins)
gmake[1]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins'
gmake -C fasm-plugin fasm.so
gmake -C xdc-plugin xdc.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/fasm-plugin'
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/xdc-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/xdc-plugin/build
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/xdc-plugin/build/xdc.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/xdc-plugin/xdc.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/fasm-plugin/build
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/fasm-plugin/build/fasm.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/fasm-plugin/fasm.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/fasm-plugin/build/fasm.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/fasm-plugin/build/fasm.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/fasm-plugin'
gmake -C params-plugin params.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/params-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/params-plugin/build
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/params-plugin/build/params.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/params-plugin/params.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/params-plugin/build/params.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/params-plugin/build/params.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/params-plugin'
gmake -C sdc-plugin sdc.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/buffers.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/buffers.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/xdc-plugin/build/xdc.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/xdc-plugin/build/xdc.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/xdc-plugin'
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/clocks.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/clocks.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
gmake -C ql-iob-plugin ql-iob.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/build
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/build/ql-iob.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/ql-iob.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/propagation.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/propagation.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/sdc.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/sdc.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/build/pcf_parser.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/pcf_parser.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/sdc_writer.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/sdc_writer.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/set_false_path.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/set_false_path.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/build/pinmap_parser.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/pinmap_parser.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/build/ql-iob.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/build/ql-iob.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-pl
ugins/ql-iob-plugin/build/pcf_parser.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin/build/pinmap_parser.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-iob-plugin'
gmake -C design_introspection-plugin design_introspection.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/design_introspection.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/design_introspection.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/set_max_delay.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/set_max_delay.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_cmd.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/get_cmd.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/set_clock_groups.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/set_clock_groups.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/sdc.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/buffers.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sd
c-plugin/build/clocks.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/propagation.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/sdc.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/sdc_writer.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/set_false_path.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/set_max_delay.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin/build/set_clock_groups.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/sdc-plugin'
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_nets.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/get_nets.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
gmake -C integrateinv-plugin integrateinv.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin/build
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin/build/integrateinv.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin/integrateinv.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_ports.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/get_ports.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin/integrateinv.cc:35:5: warning: definition of implicit copy assignment operator for 'Pin' is deprecated because it has a user-declared copy constructor [-Wdeprecated-copy]
Pin(const Pin &ref) = default;
^
/usr/local/share/yosys/include/kernel/hashlib.h:662:9: note: in implicit copy assignment operator for '(anonymous namespace)::Pin' first required here
struct entry_t
^
/usr/include/c++/v1/__algorithm/copy.h:39:17: note: in implicit copy assignment operator for 'Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t' first required here
*__result = *__first;
^
/usr/include/c++/v1/__algorithm/copy_move_common.h:107:19: note: in instantiation of function template specialization 'std::__copy_loop<std::_ClassicAlgPolicy>::operator()<Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *>' requested here
auto __result = _Algorithm()(std::move(__range.first), std::move(__range.second), std::__unwrap_iter(__out_first));
^
/usr/include/c++/v1/__algorithm/copy_move_common.h:152:19: note: in instantiation of function template specialization 'std::__unwrap_and_dispatch<std::__copy_loop<std::_ClassicAlgPolicy>, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, 0>' requested here
return std::__unwrap_and_dispatch<_NaiveAlgorithm>(std::move(__first), std::move(__last), std::move(__out_first));
^
/usr/include/c++/v1/__algorithm/copy.h:112:15: note: in instantiation of function template specialization 'std::__dispatch_copy_or_move<std::_ClassicAlgPolicy, std::__copy_loop<std::_ClassicAlgPolicy>, std::__copy_trivial, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *>' requested here
return std::__dispatch_copy_or_move<_AlgPolicy, __copy_loop<_AlgPolicy>, __copy_trivial>(
^
/usr/include/c++/v1/__algorithm/copy.h:119:15: note: in instantiation of function template specialization 'std::__copy<std::_ClassicAlgPolicy, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *>' requested here
return std::__copy<_ClassicAlgPolicy>(__first, __last, __result).second;
^
/usr/include/c++/v1/vector:1379:28: note: in instantiation of function template specialization 'std::copy<Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *>' requested here
pointer __m = std::copy(__first, __mid, this->__begin_);
^
/usr/include/c++/v1/vector:1344:9: note: in instantiation of function template specialization 'std::vector<Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t>::assign<Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t *, 0>' requested here
assign(__x.__begin_, __x.__end_);
^
/usr/local/share/yosys/include/kernel/hashlib.h:838:11: note: in instantiation of member function 'std::vector<Yosys::hashlib::pool<(anonymous namespace)::Pin>::entry_t>::operator=' requested here
entries = other.entries;
^
/usr/include/c++/v1/__utility/pair.h:74:5: note: in instantiation of member function 'Yosys::hashlib::pool<(anonymous namespace)::Pin>::pool' requested here
pair(pair const&) = default;
^
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_cells.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/get_cells.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_pins.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/get_pins.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
1 warning generated.
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin/build/integrateinv.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin/build/integrateinv.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/integrateinv-plugin'
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_count.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/get_count.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
gmake -C ql-qlf-plugin ql-qlf.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/pmgen
python3 /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/pmgen.py -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/pmgen/ql-dsp-pm.h -p ql_dsp ql_dsp.pmg
python3 /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/pmgen.py -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/pmgen/ql-dsp-macc.h -p ql_dsp_macc ql-dsp-macc.pmg
python3 /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/pmgen.py -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/pmgen/ql-bram-asymmetric-wider-write.h -p ql_bram_asymmetric_wider_write ql-bram-asymmetric-wider-write.pmg
python3 /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/pmgen.py -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/pmgen/ql-bram-asymmetric-wider-read.h -p ql_bram_asymmetric_wider_read ql-bram-asymmetric-wider-read.pmg
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/synth_quicklogic.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/synth_quicklogic.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/selection_to_tcl_list.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/selection_to_tcl_list.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/design_introspection.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/design_introspection.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/wo
rk/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_cmd.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_nets.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_ports.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_cells.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_pins.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin/build/get_count.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plu
gins/design_introspection-plugin/build/selection_to_tcl_list.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/design_introspection-plugin'
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/ql-dsp.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
gmake -C systemverilog-plugin systemverilog.so
gmake[2]: Entering directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin'
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin/build
mkdir -p /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin/build/third_party/yosys
PKG_CONFIG_PATH=/usr/local/lib/pkgconfig: PKG_CONFIG_PATH_FOR_TARGET=/usr/local/lib/pkgconfig: pkg-config --cflags Surelog
-I/usr/local/include
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -std=c++17 -Wall -W -Wextra -Wno-deprecated-declarations -Wno-unused-parameter -I/usr/local/include -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin/build/UhdmAst.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin/UhdmAst.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin/UhdmAst.cc:5057:33: error: too few arguments to function call, expected 2, have 1
if (!object->Compare(obj)) {
~~~~~~~~~~~~~~~ ^
/usr/local/include/uhdm/BaseClass.h:174:19: note: 'Compare' declared here
virtual int32_t Compare(const BaseClass* other,
^
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/pp3_braminit.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/pp3_braminit.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/quicklogic_eqn.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/quicklogic_eqn.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-edif.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/ql-edif.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
1 error generated.
gmake[2]: *** [../Makefile_plugin.common:96: /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin/build/UhdmAst.cc.o] Error 1
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/systemverilog-plugin'
gmake[1]: *** [Makefile:60: systemverilog.so] Error 2
gmake[1]: *** Waiting for unfinished jobs....
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp-simd.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/ql-dsp-simd.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp-macc.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/ql-dsp-macc.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-bram-split.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/ql-bram-split.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp-io-regs.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/ql-dsp-io-regs.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -I/usr/local/include -MMD -c -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-bram-asymmetric.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/ql-bram-asymmetric.cc
c++: warning: argument unused during compilation: '-MD' [-Wunused-command-line-argument]
c++ -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -Wall -Wextra -ggdb -I/usr/local/share/yosys/include -MD -MP -D_YOSYS_ -fPIC -I/usr/local/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -I/usr/local/include -I/usr/local/include -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -I/usr/local/include/tcl8.6 -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -O2 -pipe -fstack-protector-strong -fno-strict-aliasing -I/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -rdynamic -L/usr/local/lib -ltcmalloc -L/usr/local/lib -fstack-protector-strong -shared -o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-qlf.so /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-q
lf-plugin/build/synth_quicklogic.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/pp3_braminit.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/quicklogic_eqn.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-edif.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp-simd.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp-macc.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys
-f4pga-plugins/ql-qlf-plugin/build/ql-bram-split.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-dsp-io-regs.cc.o /wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin/build/ql-bram-asymmetric.cc.o -lstdc++ -lm -lrt -lreadline -L/usr/local/lib -lffi -lz -ltcl86
gmake[2]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins/ql-qlf-plugin'
gmake[1]: Leaving directory '/wrkdirs/usr/ports/cad/yosys-systemverilog/work/yosys-systemverilog-49069fb-2023-06-14/yosys-f4pga-plugins'
*** Error code 2
Stop.
make: stopped in /usr/ports/cad/yosys-systemverilog