RE: enabling same PPI interrupt to all CPU in ARM64 SMP

From: Souradeep Chakrabarti <schakrabarti_at_microsoft.com>
Date: Fri, 12 May 2023 14:51:00 UTC


>-----Original Message-----
>From: Souradeep Chakrabarti
>Sent: Monday, May 8, 2023 6:39 PM
>To: Kyle Evans <kevans@freebsd.org>
>Cc: Wei Hu <weh@microsoft.com>; freebsd-hackers@FreeBSD.org
>Subject: enabling same PPI interrupt to all CPU in ARM64 SMP
>
>Hi ,
>
>While using SMP in ARM64 Hyper-V we are getting stuck in boot if there is a
>interrupt for VMBus coming to CPU1 and VMBus interrupt handler is not getting
>that interrupt.
>
>In ARM64 Hyper-V we are using IRQ18 for VMBus and it is a PPI interrupt.
>
>But Hypev-V host sends interrupt to this IRQ 18 for both CPU0 and CPU1 in 2CPU
>system.
>This is based on the corresponding VMBus channel which assigned with the CPU.
>
>Now VMBus ISR is getting the interrupt in CPU0 but not getting from CPU1.
>Any idea, how we can use the same PPI 18 for all the CPU cores?
>
>Any help will be appreciated, as this is blocking the enablement of FreeBSD in Azure
>ARM64.
[Souradeep] 
Can someone please help me it. 
>
>Thanks,
>Souradeep
>