Controller timeout in SDHCI

I am working on a Xilinx ZYNQ (ARM cortex A9) based board.  I have a 13.0 setup working but my freshly build 13.1 doesn’t boot.
Upon boot while probing and attaching devices I get the following message which 

sdhci_fdt0-slot0: Controller timeout
sdhci_fdt0-slot0: ============== REGISTER DUMP ==============
sdhci_fdt0-slot0: Sys addr: 0x00060000 | Version:  0x00008901
sdhci_fdt0-slot0: Blk size: 0x00005008 | Blk cnt:  0x00000001
sdhci_fdt0-slot0: Argument: 0x00000000 | Trn mode: 0x00000013
sdhci_fdt0-slot0: Present:  0x01ff0202 | Host ctl: 0x00000001
sdhci_fdt0-slot0: Power:    0x0000000f | Blk gap:  0x00000000
sdhci_fdt0-slot0: Wake-up:  0x00000000 | Clock:    0x00004007
sdhci_fdt0-slot0: Timeout:  0x00000006 | Int stat: 0x00000001
sdhci_fdt0-slot0: Int enab: 0x01ff00fb | Sig enab: 0x01ff00fa
sdhci_fdt0-slot0: AC12 err: 0x00000000 | Host ctl2:0x00000000
sdhci_fdt0-slot0: Caps:     0x69ec0080 | Caps2:    0x00000000
sdhci_fdt0-slot0: Max curr: 0x00000001 | ADMA err: 0x00000000
sdhci_fdt0-slot0: ADMA addr:0x00000000 | Slot int: 0x00000000
sdhci_fdt0-slot0: ===========================================

This whole section repeats and the only register which seems to change is the Sys addr which goes to 0.

I imagine that the interrupt which signals a completion of a SDHCI read is probably not getting back to the driver and thus the timeout triggers but I’m not sure.

I believe the FDT for the working and 13.0 and the failing 13.1 are identical.

If anyone has any suggestions as to where to start looking that would be greatly appreciated.

Regards,
Christopher