Re: [EXTERNAL] pcib msix allocation in arm64

From: Andrew Turner <andrew_at_fubar.geek.nz>
Date: Fri, 11 Nov 2022 20:10:41 UTC

> On 11 Nov 2022, at 19:07, Souradeep Chakrabarti <schakrabarti@microsoft.com> wrote:
> 
> 
> 
> 
>> -----Original Message-----
>> From: Souradeep Chakrabarti
>> Sent: Thursday, November 10, 2022 3:20 PM
>> To: Andrew Turner <andrew@fubar.geek.nz <mailto:andrew@fubar.geek.nz>>
>> Cc: Warner Losh <imp@bsdimp.com <mailto:imp@bsdimp.com>>; Wei Hu <weh@microsoft.com <mailto:weh@microsoft.com>>; freebsd-
>> hackers@FreeBSD.org <mailto:hackers@FreeBSD.org>
>> Subject: RE: [EXTERNAL] pcib msix allocation in arm64
>> 
>> 
>> 
>> 
>>> -----Original Message-----
>>> From: Andrew Turner <andrew@fubar.geek.nz>
>>> Sent: Thursday, November 3, 2022 6:21 PM
>>> To: Souradeep Chakrabarti <schakrabarti@microsoft.com>
>>> Cc: Warner Losh <imp@bsdimp.com>; Wei Hu <weh@microsoft.com>;
>> freebsd-
>>> hackers@FreeBSD.org
>>> Subject: Re: [EXTERNAL] pcib msix allocation in arm64
>>> 
>>> Hi Souradeep,
>>> 
>>> For the vmbus_pcib driver you’ll need to implement the pcib_alloc_msi,
>>> pcib_release_msi, and the msix versions, and pcib_map_msi.
>>> 
>>> For alloc and release you can just call into the same intr_* function
>>> as pci_host_generic_acpi.c. You’ll need to pass in the xref for the
>>> interrupt controller. It needs to be the xref the MSI controller
>>> registered. For the GICv2m it’s ACPI_MSI_XREF.
>>> 
>> [Souradeep]
>> I have used following in vmbus_pcib.c :
>> ret = intr_alloc_msix(pcib, dev, ACPI_MSI_XREF, irq); But it is failing in
>> pic_lookup() with ESRCH by not finding pic with ACPI_MSI_XREF.
>> Do I need to do anything for pic_lookup() to be successful?
>> 
> [Souradeep] 
> I found out the reason here pic_lookup() for ACPI_MSI_XREF is failing, as
> we are not calling intr_msi_register() but intr_pic_register() is getting called for the PCIB.
> This is because we don't have ITS implemented in Hyper-V. Instead, Hyper-V is presenting the
> MSI/MSI-X as SPI because of it's own limitation.
> Linux has solved it using custom irqchip driver to handle it. 
> But I am not sure how to address it in FreeBSD. 
> Can you please point me out something here?

We currently only support SPIs in the GICv3 driver under FDT. To teach the ACPI attachment to support them you’ll need to set sc->gic_mbi_start and sc->gic_mbi_end in sys/arm64/arm64/gic_v3_acpi.c to the correct value from the ACPI tables before calling gic_v3_attach. After this returns successfully you can then call intr_msi_register.

See gic_v3_fdt.c for how we do it under FDT.

Andrew