RE: Status of Intel Hybrid CPU support (Alder Lake/Raptor Lake) support

> > I am not familiar with TLB part implementation for BSD. Based on your
> patch, it looks like disable PCID or force flush TLB for E core. Is that right?
> > Would you mind explain a little more to help understand the code?
> 
> The patch does what its title said. On small cores it does not rely on INVLPG
> to flush global TLB entries.  Instead, total flush of TLB with INVPCID
> instruction is performed.
> 
> For large cores, no change in behavior is intended.

Thanks. I apply the patch and test for 10 hours+ on my ADL-P laptop. It works well, and the issue is never reproduced.

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