[Bug 265348] aesni should take advantage of AVX instruction set to do hardware accelerate HMAC
Date: Wed, 20 Jul 2022 21:48:45 UTC
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=265348
Bug ID: 265348
Summary: aesni should take advantage of AVX instruction set to
do hardware accelerate HMAC
Product: Base System
Version: 13.0-RELEASE
Hardware: amd64
OS: Any
Status: New
Severity: Affects Many People
Priority: ---
Component: kern
Assignee: bugs@FreeBSD.org
Reporter: clear.screen@orange.fr
=============
Configuration
=============
1 - FREEBSD
-------------------------------------------------
Kernel version: FreeBSD 13.0-RELEASE-p11 #0: Tue Apr 5 18:54:35 UTC 2022
root@amd64-builder.daemonology.net:/usr/obj/usr/src/amd64.amd64/sys/GENERIC
2 - CPU
-------------------------------------------------
intel xeon E5-2603 v3
Features2=0x7ffefbff<SSE3,PCLMULQDQ,DTES64,MON,DS_CPL,VMX,SMX,EST,TM2,SSSE3,SDBG,FMA,CX16,xTPR,PDCM,PCID,DCA,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,TSCDLT,AESNI,XSAVE,OSXSAVE,AVX,F16C,RDRAND>
3 - AESNI
-------------------------------------------------
aesni register following features : aesni0:
<AES-CBC,AES-CCM,AES-GCM,AES-ICM,AES-XTS>
4 - GELI
-------------------------------------------------
kernel: 7
userland: 7
===========
DESCRIPTION
===========
If only AES instruction set are available and not SHA instruction set, geli is
working as "accelerated software" with -e AES-XTS and only "software" with -e
AES-XTS AND -a HMAC/*
As instruction set exists to accelerate HMAC SSE but mainly AVX which seems to
be employed on linux to accelerate SHA (sample
linux/arch/x86/crypto/sha256-avx-asm.S)
Freebsd should take if possible advantage of such instructions to add benefits
of full acceleration for encryption with AES instruction set and authentication
with AVX instruction set (fast SHA implementation).
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