[Bug 256261] TSC-low hardware timer breaks C-States on Intel Core2 generation of CPUs

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=256261

            Bug ID: 256261
           Summary: TSC-low hardware timer breaks C-States on Intel Core2
                    generation of CPUs
           Product: Base System
           Version: 13.0-STABLE
          Hardware: amd64
                OS: Any
            Status: New
          Severity: Affects Many People
          Priority: ---
         Component: kern
          Assignee: bugs@FreeBSD.org
          Reporter: freebsd@frost.kiwi

FreeBSD users with an Intel Core2 CPU have reported broken C-states for a while
now, as originally reported here:
https://forums.freebsd.org/threads/c-states-not-used.66192/
The CPU would refuse to enter any C-state higher than C1. As a result power
consumption suffered.
Luckily this is a known issue in DragonFlyBSD, with hardware timers being at
fault ( https://www.dragonflybsd.org/docs/user/Powersave/#index1h2 ).

The fix for FreeBSD is simpler: Simply changing the hardware time to anything
other than TSC-low fixes the issue and the CPU enters C2 and higher. Eg.
kern.timecounter.hardware=HPET 

A quick workaround would be to disable the TSC-low timer on all Intel Core2
CPUs, by lowering it's timecounter.choise score.

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