Re: When will FreeBSD support RPI5?

On Sat, 13 Jan 2024 at 19:05, Mike Karels <mike@karels.net> wrote:

> On 13 Jan 2024, at 12:32, Mark Millard wrote:
>
> > On Jan 13, 2024, at 07:38, Doug Rabson <dfr@rabson.org> wrote:
> >
> >> Getting back to the RPI 5, with a tweak to
> arm/broadcom/bcm2835bcm2835_vcbus.c to treat the memory config the same as
> RPI 4 and to dev/sdhci/sdhci_fdt.c to treat the RPI 5 sdhci controllers as
> generic, I can boot to multiuser mode using the EDK2 firmware from
> https://github.com/worproject/rpi5-uefi with ACPI/Device Tree mode set to
> Both.
> >
> > What does FreeBSD do with "Both"? Does it actually use some ACPI
> > and some Device Tree? Or does it just use ACPI? Does your
> > combination do anything different than just using ACPI?
> >
> >> This does not have working PCIe or ethernet yet - I think ethernet
> ought to work since we seem to have a matching driver in the tree in
> dev/cadence.
> >
> > Sounds like the same status as booting just ACPI with no such
> > adjustments too bcm2835bcm2835_vcbus.c or sdhci_fdt.c ?
> >
> > I think Mike Karels plans on investigating getting Ethernet
> > going based on cgem . I've no clue if this is ACPI, DeviceTree,
> > or both.
>
> The cadence/cgem driver uses FDT.  I haven't looked at details yet.  The
> addition
> might be as simple as adding a compat string.  Hopefully it doesn't
> require major
> surgery.  I just ordered an RPi 5 (8 GB); it will take a while to be
> delivered.
>

The existing driver has the correct compat string but we don't get that far
since the rp1 node doesn't get probed and attached. This node is nested
under pcie@120000 and the whole subtree never gets explored. Interestingly,
if I hack the 2711 driver a little (based on reading Linux sources), I can
get that to attach and the rp1 southbridge is visible on the PCI bus with
vendor id 0x1de4, device id 0x0001. I made a stub driver for it but that
isn't particularly helpful since we need an FDT device to get simplebus to
attach and discover all the rp1 sub-devices.

I could try to add any ofw children to the pcie device, I guess. By the
looks of things, that just needs me to implement ofw_bus_get_devinfo and
maybe bus_get_resource_list in the pcie driver. Reading the DTB sources,
the 2711 pcie separates out the MSI part as a separate node in the DTB
which will need a driver before we can get much further.