RK3568 clock tree problems

while trying to make emmc work on an opi 3b  i spotted some possible problems with the clock tree / drivers

the problems won’t surface if you don’t want to set to many frequencies but still

rk_clk_mux.c 
will select any bogus frequency from the last parent if the initial set_clock_freq call had ROUND_UP or ROUND_DOWN flag
because it does not keeps a best frequency

rk_clk_mux.c may select a “BUSY” parent if the parent chosen is busy and it need its freq adjusted and the function will fail but return succes because the 
last call that sets the parent freq will ignore return code (the set_freq function succeeds when DRYRUN is set even if the clock is busy)

rk_clk_composite will not try to find a good frequency starting with the current parent but with the first one and may change parent
when only changing the div is possible

neither of the above will stop searching if the required freq is reached

rk3568_cru has incorrect div with definitions for some clocks which make their designed frequency unconfigurable
ex div25m with a parent of 1GHz has a div width of 5 bits instead of 6


i have some rough/wip patches if anyone needs them